P2Lib: T. Sakurai, and A. R. Newton, "A simple MOSFET model for circuit analysis," IEEE Trans. Electron Devices, vol. 38, no. 4, pp. 887-893, Apr. 1991.

This paper describes a process-portable library and its generation system called P2Lib. From technology parameters which characterize a fabrication process, P2Lib generates a complete set of standard cell libraries for logic synthesis, logic simulation, and layout synthesis. A distinctive feature of P2Lib is the rapid characterization of timing and power dissipation by an analytic-oriented method, as well as the accurate characterization by circuit simulation. A designer can quickly create a library under various operating conditions and process specifications, so that he can examine his design with CAD tools. The quality of generated libraries(layout and timing) are discussed and a design example with P2Lib is presented. 1 Introduction A cell library is the foundation of all ASIC designs. Performance of a cell library is directly reflected in the final quality of ASICs. It is therefore customary that a cell library be designed carefully by a silicon foundry such that the library can..