A High-level, Reconfigurable Power-Simulator

The calculation of the energy consumption of an algorithm can be performed analytically for the case of random data on all signals within a circuit. The statistical properties of the signals in an application need however not be of a random nature. Hence there is a need for tools which help the user to find either spots in a circuit which consume considerably more energy than one would expect in the average case, or spots which dissipate considerably less energy, due to signal correlation. I. Introduction Low power design methods [1] are of major importance for the utilization of all features offered by submicron processes. The simulator introduced is able to plot the energy consumption in each cycle of an algorithm and/or the hardware implementation of an algorithm, for each high level operation, like addition, and multiplication, executed. This method differs considerably from the dual bit-type method introduced in [2] and architectural VHDL simulations based on non-synthesized [3] ..