Designing a client-side cache for a distributed file system is complicated by concurrent accesses by applications, network communication with the server, and complex relationships between the data in the cache. Despite these difficulties, caches are usually built using threads or finite state machines as the programming model, even though both are inadequate for the task. We have created an infrastructure for cache development based on multi-threaded state machines, which attempts to capitalize on the benefits of both programming models. The state machine allows the global state of the cache to be carefully controlled, allowing interactions between concurrent cache operations to be reasoned about and verified. Threads allow individual opera...
Due to the character of the original source materials and the nature of batch digitization, quality ...
We propose and evaluate an approach for decoupling persistent-cache management from general file sys...
technical reportThe next generation of scalable parallel systems (e.g., machines by KSR, Convex, and...
This thesis explores ways in which intermediate cache servers affect the performance and scalability...
this paper we propose and evaluate a novel multithreaded processor organization that relies on cache...
Abstract—Multi-threaded applications execute their threads on different cores with their own local c...
This thesis answers the question whether a scheduler needs to take into account where communicating...
v Abstract Caching has long been recognized as a powerful performance enhancement technique in many...
This paper proposes a dynamic cache partitioning method for simultaneous multithreading systems. We ...
Abstract: Simultaneous multithreaded (SMT) processors use data caches which are dynamically shared b...
Caching has long been recognized as a powerful performance enhancement technique in many areas of co...
The design of the memory hierarchy in a multi-core architecture is a critical component since it mus...
[[abstract]]©1998 JISE-A multithreaded computer maintains multiple program counters and register fil...
Multithreading techniques used within computer processors aim to provide the computer system with ...
Abstract. Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-p...
Due to the character of the original source materials and the nature of batch digitization, quality ...
We propose and evaluate an approach for decoupling persistent-cache management from general file sys...
technical reportThe next generation of scalable parallel systems (e.g., machines by KSR, Convex, and...
This thesis explores ways in which intermediate cache servers affect the performance and scalability...
this paper we propose and evaluate a novel multithreaded processor organization that relies on cache...
Abstract—Multi-threaded applications execute their threads on different cores with their own local c...
This thesis answers the question whether a scheduler needs to take into account where communicating...
v Abstract Caching has long been recognized as a powerful performance enhancement technique in many...
This paper proposes a dynamic cache partitioning method for simultaneous multithreading systems. We ...
Abstract: Simultaneous multithreaded (SMT) processors use data caches which are dynamically shared b...
Caching has long been recognized as a powerful performance enhancement technique in many areas of co...
The design of the memory hierarchy in a multi-core architecture is a critical component since it mus...
[[abstract]]©1998 JISE-A multithreaded computer maintains multiple program counters and register fil...
Multithreading techniques used within computer processors aim to provide the computer system with ...
Abstract. Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-p...
Due to the character of the original source materials and the nature of batch digitization, quality ...
We propose and evaluate an approach for decoupling persistent-cache management from general file sys...
technical reportThe next generation of scalable parallel systems (e.g., machines by KSR, Convex, and...