We describe an automatic verification technique for distributed real-time systems that are specified as Communicating Real-Time State Machines (CRSMs). CRSMs are timed state machines that communicate synchronously over uni-directional channels. The proposed approach is to model the behavior of the system of (an expressive subclass of) CRSMs by a timed reachability graph. The system behavior of CRSMs is characterized by a time-stamped trace of communication events. We provide a decision procedure for verifying timing and safety properties (specified in a notation based on Real-Time Logic) of the reachability graph, and hence of the corresponding system of CRSMs. We also present a condition for the existence of deadlock in a system of CRSMs. ...
Timed Concurrent State Machines are an application of Alur Timed Automata concept tocoincidence-base...
We consider the problem of model checking message-passing systems with real-time requirements. As be...
Abstract The task of checking if a computer system satisfies its timing specifications is extremelyi...
The increasing use of model-based tools enables further use of formal verification techniques in the...
Abstract—Real-time systems (RTSs) interact with their en-vironment under time constraints. Such cons...
This papers describes modifications to and the implementation of algorithms previously described in ...
[[abstract]]In this paper, we present a new compositional verification methodology for efficiently v...
We consider the problem of model checking message-passing systems with real-time requirements. As be...
This article introduces a fully automated verification technique that permits to analyze real-time s...
Abstract In real-time systems, correctness depends on the time at which events occur. Examples of re...
This article introduces a fully automated verification technique that permits to analyze real-time s...
It is important to reason about a number of desirable protocol properties to ensure correctness of a...
The traditional approach for analyzing correctness of systems is to identify a set of reachable stat...
The paper presents a verification of the IEEE Root Contention Protocol as an illustration of a new a...
The paper presents a verification of the IEEE Root Contention Protocol as an illustration of a new a...
Timed Concurrent State Machines are an application of Alur Timed Automata concept tocoincidence-base...
We consider the problem of model checking message-passing systems with real-time requirements. As be...
Abstract The task of checking if a computer system satisfies its timing specifications is extremelyi...
The increasing use of model-based tools enables further use of formal verification techniques in the...
Abstract—Real-time systems (RTSs) interact with their en-vironment under time constraints. Such cons...
This papers describes modifications to and the implementation of algorithms previously described in ...
[[abstract]]In this paper, we present a new compositional verification methodology for efficiently v...
We consider the problem of model checking message-passing systems with real-time requirements. As be...
This article introduces a fully automated verification technique that permits to analyze real-time s...
Abstract In real-time systems, correctness depends on the time at which events occur. Examples of re...
This article introduces a fully automated verification technique that permits to analyze real-time s...
It is important to reason about a number of desirable protocol properties to ensure correctness of a...
The traditional approach for analyzing correctness of systems is to identify a set of reachable stat...
The paper presents a verification of the IEEE Root Contention Protocol as an illustration of a new a...
The paper presents a verification of the IEEE Root Contention Protocol as an illustration of a new a...
Timed Concurrent State Machines are an application of Alur Timed Automata concept tocoincidence-base...
We consider the problem of model checking message-passing systems with real-time requirements. As be...
Abstract The task of checking if a computer system satisfies its timing specifications is extremelyi...