Add to ORKGThe goal of this paper is to give upper bounds for the delay of a frame and upper bounds for the memory required in an Ethernet switch, depending on the traffic received by this switch. We analyz
[[abstract]]In this paper, we prove a necessary and sufficient condition for the construction of 2-t...
[[abstract]]In this paper, we prove a necessary and sufficient condition for the construction of 2-t...
This paper addresses the problem of computing end-to-end delay bounds for a traffic flow traversing ...
Using two different packet scheduling policies, the maximum throughputs of an input-buffered ATM swi...
Abstract. We consider FIFO buffer management for switches providing differentiated services. In each...
In a wide area network that uses store-and-forward technology, a packet switch buffers incoming data...
Colloque avec actes et comité de lecture. internationale.International audienceSwitched Ethernet is ...
We consider FIFO buffer management for switches providing differentiated services. In each time step...
The goal of this paper is to examine the gains of partial upgrades to existing FIFO networks, to sup...
This paper addresses the problem of estimating the worst-case end-to-end delay for a flow in a tande...
In this paper, an FPGA based FIFO with efficient memory management is proposed, which allows fast fo...
Recent advances in optical technology show the possibility of building all-optical buffers in the ne...
Recent results on Network Calculus applied to FIFO networks show that, in the general case, end-to-e...
textabstractWe consider a network providing Differentiated Services (Diffserv), which allow Internet...
Part of the content of this report has appeared as [1] and [2]. This paper addresses the problem of ...
[[abstract]]In this paper, we prove a necessary and sufficient condition for the construction of 2-t...
[[abstract]]In this paper, we prove a necessary and sufficient condition for the construction of 2-t...
This paper addresses the problem of computing end-to-end delay bounds for a traffic flow traversing ...
Using two different packet scheduling policies, the maximum throughputs of an input-buffered ATM swi...
Abstract. We consider FIFO buffer management for switches providing differentiated services. In each...
In a wide area network that uses store-and-forward technology, a packet switch buffers incoming data...
Colloque avec actes et comité de lecture. internationale.International audienceSwitched Ethernet is ...
We consider FIFO buffer management for switches providing differentiated services. In each time step...
The goal of this paper is to examine the gains of partial upgrades to existing FIFO networks, to sup...
This paper addresses the problem of estimating the worst-case end-to-end delay for a flow in a tande...
In this paper, an FPGA based FIFO with efficient memory management is proposed, which allows fast fo...
Recent advances in optical technology show the possibility of building all-optical buffers in the ne...
Recent results on Network Calculus applied to FIFO networks show that, in the general case, end-to-e...
textabstractWe consider a network providing Differentiated Services (Diffserv), which allow Internet...
Part of the content of this report has appeared as [1] and [2]. This paper addresses the problem of ...
[[abstract]]In this paper, we prove a necessary and sufficient condition for the construction of 2-t...
[[abstract]]In this paper, we prove a necessary and sufficient condition for the construction of 2-t...
This paper addresses the problem of computing end-to-end delay bounds for a traffic flow traversing ...