The current paper reports on the first results of building a retargetable compiler for reconfigurable computing. The discussed research is part of a larger project whose main objective is to develop a semi-automatic tool platform for reconfigurable computing supporting a fully integrated design environment. It constitutes the first attempt to provide a workbench that will cover the entire design trajectory of general-purpose augmented processors with reconfigurable computing parts. The scope of the proposed platform regards processors that intend to speed-up single program execution using reconfigurable hardware. Consequently, the Delft Workbench platform targets architectures with single program counters (uni-processors) incorporating reco...
International audienceMany reconfigurable hardware architectures have been proposed so far, ranging ...
Retargetable C compilers are key components of today’s embedded processor design platforms for quick...
International audienceMany reconfigurable hardware architectures have been proposed so far, ranging ...
International audienceEmbedded core processors are becoming a vital part of today's system-on-a-chi...
International audienceEmbedded core processors are becoming a vital part of today's system-on-a-chi...
This paper describes an approach to hardware /software design space exploration for reconfigurable p...
The core tool in Application-Specific Instruction Set Processor (ASIP) design toolsets is a retarget...
This paper introduces a flexible code generation framework dedicated to the design of application sp...
Heterogeneous systems combine both data and control processing functions. A programmable DSP core fo...
Due to its potential to greatly accelerate a wide variety of applications, reconfigurable computing ...
This thesis addresses the use of reconfigurable hardware in computing platforms, in order to harness...
The capability to tailor the processor instruction set architecture (ISA) around the computational r...
Our ability to create systems with large amount of hardware parallelism is exceeding the average sof...
International audienceMany reconfigurable hardware architectures have been proposed so far, ranging ...
Abstract—This paper presents the design alternatives for reconfigurable instruction set processors (...
International audienceMany reconfigurable hardware architectures have been proposed so far, ranging ...
Retargetable C compilers are key components of today’s embedded processor design platforms for quick...
International audienceMany reconfigurable hardware architectures have been proposed so far, ranging ...
International audienceEmbedded core processors are becoming a vital part of today's system-on-a-chi...
International audienceEmbedded core processors are becoming a vital part of today's system-on-a-chi...
This paper describes an approach to hardware /software design space exploration for reconfigurable p...
The core tool in Application-Specific Instruction Set Processor (ASIP) design toolsets is a retarget...
This paper introduces a flexible code generation framework dedicated to the design of application sp...
Heterogeneous systems combine both data and control processing functions. A programmable DSP core fo...
Due to its potential to greatly accelerate a wide variety of applications, reconfigurable computing ...
This thesis addresses the use of reconfigurable hardware in computing platforms, in order to harness...
The capability to tailor the processor instruction set architecture (ISA) around the computational r...
Our ability to create systems with large amount of hardware parallelism is exceeding the average sof...
International audienceMany reconfigurable hardware architectures have been proposed so far, ranging ...
Abstract—This paper presents the design alternatives for reconfigurable instruction set processors (...
International audienceMany reconfigurable hardware architectures have been proposed so far, ranging ...
Retargetable C compilers are key components of today’s embedded processor design platforms for quick...
International audienceMany reconfigurable hardware architectures have been proposed so far, ranging ...