As technology scales, fault tolerance is becoming a key concern in on-chip communication. Consequently, this work examines fault tolerant communication algorithms for use in the NoC domain. Two different flooding algorithms and a random walk algorithm are investigated. We show that the flood-based fault tolerant algorithms have an exceedingly high communication overhead. We find that the redundant random walk algorithm offers significantly reduced overhead while maintaining useful levels of fault tolerance. We then compare the implementation costs of these algorithms, both in terms of area as well as in energy consumption, and show that the flooding algorithms consume an order of magnitude more energy per message transmitted
Abstract—The structural redundancy inherent to on-chip interconnection networks [networks on chip (N...
Rapid scaling of transistor gate sizes has increased the density of on-chip integration and paved th...
Growing complexity of Systems on Chip (SoC) introduces interconnection problems. As a solution for c...
Network on a chip (NoC) has been proposed as a viable solution to counter the inefficiency of buses ...
The increasingly parallel landscape of embedded computing platforms is bringing the reliability conc...
Network-on-Chip (NoC) is a key component in chip multiprocessors (CMPs) as it supports communication...
Abstract. In DSM and nanometer technology, there will present more and more new fault types, which a...
International audienceThe use of fault-tolerant mechanism is essential to ensure the correct functio...
International audienceFault-tolerant design of Network-on-chip communication architectures requires ...
Network on Chip (NoC) is a communication subsystem, which has the logic for sending and receiving th...
International audienceDue to transistor shrinking and core number increasing in System-on-Chip (SoC)...
Networks on Chip presents a variety of topics, problems and approaches with the common theme to syst...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
The advent of deep sub-micron technology has exacerbated reliability issues in on-chip interconnects...
Networks-on-Chip (NoCs) appeared as a strategy to deal with the communication requirements of comple...
Abstract—The structural redundancy inherent to on-chip interconnection networks [networks on chip (N...
Rapid scaling of transistor gate sizes has increased the density of on-chip integration and paved th...
Growing complexity of Systems on Chip (SoC) introduces interconnection problems. As a solution for c...
Network on a chip (NoC) has been proposed as a viable solution to counter the inefficiency of buses ...
The increasingly parallel landscape of embedded computing platforms is bringing the reliability conc...
Network-on-Chip (NoC) is a key component in chip multiprocessors (CMPs) as it supports communication...
Abstract. In DSM and nanometer technology, there will present more and more new fault types, which a...
International audienceThe use of fault-tolerant mechanism is essential to ensure the correct functio...
International audienceFault-tolerant design of Network-on-chip communication architectures requires ...
Network on Chip (NoC) is a communication subsystem, which has the logic for sending and receiving th...
International audienceDue to transistor shrinking and core number increasing in System-on-Chip (SoC)...
Networks on Chip presents a variety of topics, problems and approaches with the common theme to syst...
The aggressive semiconductor technology scaling provides the means for doubling the amount of transi...
The advent of deep sub-micron technology has exacerbated reliability issues in on-chip interconnects...
Networks-on-Chip (NoCs) appeared as a strategy to deal with the communication requirements of comple...
Abstract—The structural redundancy inherent to on-chip interconnection networks [networks on chip (N...
Rapid scaling of transistor gate sizes has increased the density of on-chip integration and paved th...
Growing complexity of Systems on Chip (SoC) introduces interconnection problems. As a solution for c...