Value reuse technique eliminates the redundant evaluation of expressions, using the support of hardware at runtime to eliminate them. The potential performance of a value reuse mechanism not only depends on the number of instances it has eliminated, but as well as on the time spent in detecting the instance to be eliminated. In order to have better value reuse, we move from instruction level reuse to function reuse, so that one can detect more eliminative instances with reasonable e#ort. This removes the extra time spent on detecting the possibility of instruction execution elimination. The results of the mathematical library functions evaluated can be reused. Since they can be treated as instructions, i.e, functions which do not have side-...
Program redundancy analysis and optimization have been an important component in optimizing compiler...
As transistors sizes shrink and architects put more and more cores on chip, computer systems become ...
We present a static analysis that estimates reusable memory cells and a source-level transformation ...
Value-driven redundancy elimination is a combination of value numbering and code motion. Value numbe...
The fact that instructions in programs often produce repetitive results has motivated researchers to...
This work was also published as a Rice University thesis/dissertation: http://hdl.handle.net/1911/16...
The fact that instructions in programs often produce repetitive results has motivated researchers to...
Superscalar microprocessors currently power the majority of computing machines. These processors ar...
Value locality is the phenomenon that a small number of values occur repeatedly in the same register...
This paper presents a study of the performance limits of data value reuse. Two types of data value r...
Variables and instructions that have invariant or predictable values at run-time, but cannot be iden...
In code generation, instruction selection chooses processor instructions to implement a program unde...
This document presents an implementation of several types of value numbering within the Massively Sc...
We present a static analysis that estimates reusable memory cells and a source-level transformation ...
We propose a Domain-Specific Architecture for elementary function com-putation to improve throughput...
Program redundancy analysis and optimization have been an important component in optimizing compiler...
As transistors sizes shrink and architects put more and more cores on chip, computer systems become ...
We present a static analysis that estimates reusable memory cells and a source-level transformation ...
Value-driven redundancy elimination is a combination of value numbering and code motion. Value numbe...
The fact that instructions in programs often produce repetitive results has motivated researchers to...
This work was also published as a Rice University thesis/dissertation: http://hdl.handle.net/1911/16...
The fact that instructions in programs often produce repetitive results has motivated researchers to...
Superscalar microprocessors currently power the majority of computing machines. These processors ar...
Value locality is the phenomenon that a small number of values occur repeatedly in the same register...
This paper presents a study of the performance limits of data value reuse. Two types of data value r...
Variables and instructions that have invariant or predictable values at run-time, but cannot be iden...
In code generation, instruction selection chooses processor instructions to implement a program unde...
This document presents an implementation of several types of value numbering within the Massively Sc...
We present a static analysis that estimates reusable memory cells and a source-level transformation ...
We propose a Domain-Specific Architecture for elementary function com-putation to improve throughput...
Program redundancy analysis and optimization have been an important component in optimizing compiler...
As transistors sizes shrink and architects put more and more cores on chip, computer systems become ...
We present a static analysis that estimates reusable memory cells and a source-level transformation ...