Compiler Techniques for Software Prefetching on Cache-Coherent Shared-Memory Multiprocessors

This document describes a set of new techniques for improving the efficiency of compiler-directed software prefetching for parallel Fortran programs running on cache-coherent DSM (distributed shared memory) multiprocessors. The key component used in this scheme is a data flow framework that exploits information about array access patterns and about the cache coherence protocol to predict at compile-time the sets of array references that are likely to cause coherence activity at run-time. The information derived from the data flow framework can be used to aid in applying a variety of optimizations, including better prefetching for coherence misses, more precise application of exclusivemode prefetching, and better prefetching for false-shared data. 1 Introduction Cache-coherent shared-memory multiprocessors are an attractive platform for small- to medium-scale parallel programming, since they provide a convenient programming model based on a hardware-supported shared address space. Mode..