Block-processing is a powerful and popular technique for increasing computation speed by simultaneously processing several samples of data. In comparison with conventional computations, block-processed computations have reduced hardware and power dissipation requirements and result in less expensive implementations on uniprocessor and parallel programmable platforms. The effectiveness of block-processing is often reduced, however, due to suboptimal placement of delays in the dataflow graph of a computation. In this paper we investigate an application of the retiming transformation for improving the effectiveness of block-processing in computation structures. Specifically, we consider the k-delay problem in which we wish to restructure any g...
tree delay, average tree delay (i.e., sum of delays to all the pins), or any other well-behaved dela...
This artifact accompanies the paper "Parallel Block-Delayed Sequences" at PPoPP'22. The paper presen...
Multirate digital signal processing (DSP) algorithms are often modeled with synchronous dataflow gra...
The retiming transformation can be used to optimize synchronous circuits for maximum speed of operat...
International audience— Multidimensional retiming is an efficient optimization approach that ensures...
This paper considers the implementation of a two-point diagonally implicit block method for solving ...
In this paper, we study the problem of retiming of sequential circuits with both interconnect and ga...
Many computation-intensive or recursive applications commonly found in digital signal processing and...
In this paper, we study the performance driven multiw aycircuit partitioning problem with considera...
Abstract: The paper proposes a model and a method for optimizing computational processes in parallel...
Retiming, including pipelining, is applied to make the processing units (PUs) run at a required thro...
International audience— Nested loops present the most critical sections in several embedded real-tim...
Abstract { This paper presents a new optimization technique called architectural retiming which is a...
[[abstract]]We propose an exact clustering with retiming algorithm to minimize the clock period for ...
Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP)ap...
tree delay, average tree delay (i.e., sum of delays to all the pins), or any other well-behaved dela...
This artifact accompanies the paper "Parallel Block-Delayed Sequences" at PPoPP'22. The paper presen...
Multirate digital signal processing (DSP) algorithms are often modeled with synchronous dataflow gra...
The retiming transformation can be used to optimize synchronous circuits for maximum speed of operat...
International audience— Multidimensional retiming is an efficient optimization approach that ensures...
This paper considers the implementation of a two-point diagonally implicit block method for solving ...
In this paper, we study the problem of retiming of sequential circuits with both interconnect and ga...
Many computation-intensive or recursive applications commonly found in digital signal processing and...
In this paper, we study the performance driven multiw aycircuit partitioning problem with considera...
Abstract: The paper proposes a model and a method for optimizing computational processes in parallel...
Retiming, including pipelining, is applied to make the processing units (PUs) run at a required thro...
International audience— Nested loops present the most critical sections in several embedded real-tim...
Abstract { This paper presents a new optimization technique called architectural retiming which is a...
[[abstract]]We propose an exact clustering with retiming algorithm to minimize the clock period for ...
Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP)ap...
tree delay, average tree delay (i.e., sum of delays to all the pins), or any other well-behaved dela...
This artifact accompanies the paper "Parallel Block-Delayed Sequences" at PPoPP'22. The paper presen...
Multirate digital signal processing (DSP) algorithms are often modeled with synchronous dataflow gra...