The Price of Routing in FPGAs

This paper studies an architectural issue concerning field programmable gate arrays (FPGAs). The observation of mainstream FPGA architectures leads to the following remark: in these circuits, the proportion of silicon devoted to reconfigurable routing is increasing, reducing the proportion of silicon available for computation resources. A quantitative analysis shows that this trend, if pursued, will lead to a widening gap between FPGA performance and VLSI performance. Some prospective solutions to this problem are discussed