Using Reconfigurable Hardware to Speed up Product Development and Performance.

HARP1 is a circuit board designed to exploit the rigorous compilation of parallel algorithms directly into hardware. It includes a transputer closely coupled to a Field--Programmable Gate Array (FPGA). The whole system may be regarded as an instance of a process in the sense of the theory of Communicating Sequential Processes (CSP). And the major elements are also naturally viewed in the same way: both can implement many parallel communicating sub--processes. HARP1 is being used as part of a joint project between Oxford Parallel and Sharp Laboratories of Europe within the Parallel Applications Programme supported by DTI/SERC. Here it is the target of mathematical tools based upon Ruby and occam which enable unusual and novel applications to be produced and demonstrated correctly and rapidly. The design includes memory banks, a programmable frequency synthesizer and a several communication ports. The latter supports the use of parallel arrays of HARP1 boards, as well as interfacing to ..