Performance Issues in the Design of Hierarchical-ring and Direct Networks for Shared-memory Multiprocessors

Performance Issues in the Design of Hierarchical-ring and Direct Networks for Shared-memory Multiprocessors Govindan Ravindran Doctor of Philosophy Graduate Department of Electrical and Computer Engineering University of Toronto 1998 This dissertation explores performance issues in the design of interconnection networks for shared-memory multiprocessors. In particular, it considers low-dimensional direct (e.g., mesh and tori) and hierarchical-ring networks, and studies issues in topology, buffer management, switching, routing and flow control. The performance evaluation is primarily done by simulating the target systems at the register transfer level on a cycle-by-cycle basis using both synthetic and real (SPLASH-2) workloads. The contributions of the dissertation include: ffl the first extensive performance study specifically for shared-memory multiprocessor interconnection networks. Prior research focused primarily on distributed memory systems. It is important to consider shared-m..