Registers On Demand: Integrated register allocation and instruction scheduling

Two of the most important phases of code generation for instruction level parallel processors are register allocation and instruction scheduling. Applying one phase before the other has in both cases its drawbacks. In this paper we present a new method which integrates register allocation and scheduling, called Registers on Demand. We discuss register selection, spilling and the insertion of state preserving code around function calls. We have implemented the new method and results are presented. From the experiments we conclude that our method gives good results in particular for applications for which registers are a critical resource. 1 Introduction Modern optimizing compilers contain several optimization phases, including register allocation and instruction scheduling which have received widespread attention in past academic and industrial research [1, 2]. The separation between register allocation and instruction scheduling phases has its impact on the produced code, decisions m..