We present several fast, practical linear-complexity scheduling algorithms that enable provision of various quality-of-service (QoS) guarantees in an input-queued switch with no speedup. Specifically, our algorithms provide per-virtual-circuit transmission rate and cell delay guarantees using a credit-based bandwidth reservation scheme. Our algorithms also provide approximate max-min-fair sharing of unreserved switch capacity. The novelties of our algorithms derive from judicious choices of edge weights in a bipartite matching problem. The edge weights are certain functions of the amount and waiting times of queued cells and credits received by a virtual circuit. By using a linear-complexity variation of the well-known stable marriage match...
Output-queued switching, though is able to offer high throughput, guaranteed delay and fairness, lac...
Output-queued switching, though is able to offer high throughput, guaranteed delay and fairness, lac...
In this paper we present three algorithms that provide performance guarantees for scheduling switche...
While the Internet has quietly served as a research and education vehicle for more than two decades,...
While the Internet has quietly served as a research and education vehicle for more than two decades,...
An input-queued switch with virtual output queuing is able to provide a maximum throughput of 100 % ...
Abstract-Crosspoint butTered switches are emerging as the focus of research in high-speed routers. T...
The delay and throughput characteristics of a packet switch depend mainly on the queuei...
The delay and throughput characteristics of a packet switch de-pend mainly on the queueing scheme an...
The unifying theme of this thesis is the design of packet schedulers to provide quality-of-service (...
Telecommunication Systems, 34(1-2): pp. 37-49.This paper presents a class of algorithms for scheduli...
The choice of the scheduling algorithm is a major design criteria of a switch. Whereas it is known t...
Despite increasing bandwidth demand and the significant research and commercial activity in large-sc...
Abstract. In this article, we develop a general methodology, mainly based upon Lyapunov functions, t...
Input buffered switches are known to suffer from head-of-line blocking that limits the throughput to...
Output-queued switching, though is able to offer high throughput, guaranteed delay and fairness, lac...
Output-queued switching, though is able to offer high throughput, guaranteed delay and fairness, lac...
In this paper we present three algorithms that provide performance guarantees for scheduling switche...
While the Internet has quietly served as a research and education vehicle for more than two decades,...
While the Internet has quietly served as a research and education vehicle for more than two decades,...
An input-queued switch with virtual output queuing is able to provide a maximum throughput of 100 % ...
Abstract-Crosspoint butTered switches are emerging as the focus of research in high-speed routers. T...
The delay and throughput characteristics of a packet switch depend mainly on the queuei...
The delay and throughput characteristics of a packet switch de-pend mainly on the queueing scheme an...
The unifying theme of this thesis is the design of packet schedulers to provide quality-of-service (...
Telecommunication Systems, 34(1-2): pp. 37-49.This paper presents a class of algorithms for scheduli...
The choice of the scheduling algorithm is a major design criteria of a switch. Whereas it is known t...
Despite increasing bandwidth demand and the significant research and commercial activity in large-sc...
Abstract. In this article, we develop a general methodology, mainly based upon Lyapunov functions, t...
Input buffered switches are known to suffer from head-of-line blocking that limits the throughput to...
Output-queued switching, though is able to offer high throughput, guaranteed delay and fairness, lac...
Output-queued switching, though is able to offer high throughput, guaranteed delay and fairness, lac...
In this paper we present three algorithms that provide performance guarantees for scheduling switche...