In this paper, we propose and evaluate a bidirectional slotted ring architecture for the distributed shared memory multiprocessor model. We provide a performance analysis of the proposed architecture by deriving an analytical model and studying the effects of varying system and workload parameters. The performance of the bidirectional ring architecture is compared against the unidirectional slotted ring model. The effects of workload parameters such as miss rate, communication locality, and write probability, and system parameters such as relative processor speed and message length on miss latency, processor utilization, and effective computation power are analyzed in detail. The analytical model was evaluated using workload parameters extr...
grantor: University of TorontoThis dissertation explores performance issues in the design ...
A distributed system is a collection of computers that are connected via a communication network. Di...
This work deals with the performance evaluation of an MIMD distributed shared-memory parallel comput...
grantor: University of TorontoA bidirectional ring is proposed in this thesis as an interc...
79 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1984.This thesis surveys existing p...
This paper introduces a high throughput bus concept, named “Frame Synchronized Ring” (FSR-bus). The ...
Performance Issues in the Design of Hierarchical-ring and Direct Networks for Shared-memory Multipro...
this paper we present an analytical model of a ring-based shared-memory multiprocessor operating the...
This paper compares the performance of hierar-chical ring- and mesh-connected wormhole routed shared...
A novel efficient bus architecture is presented together with an application. The bus architecture b...
We present a new analytical performance model of the IEEE P1596 Standard Coherent Interface, which i...
A parallel matrix multiplication algorithm is presented, and studies of its performance and estimati...
Approximate analytical queuing network models for expected message packet delay in 2-level and 3-lev...
Asynchronous packetswitched interconnection networks with decentralized control are very appropriate...
A shared memory multiprocessor having clusters of processing elements and memory modules is proposed...
grantor: University of TorontoThis dissertation explores performance issues in the design ...
A distributed system is a collection of computers that are connected via a communication network. Di...
This work deals with the performance evaluation of an MIMD distributed shared-memory parallel comput...
grantor: University of TorontoA bidirectional ring is proposed in this thesis as an interc...
79 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1984.This thesis surveys existing p...
This paper introduces a high throughput bus concept, named “Frame Synchronized Ring” (FSR-bus). The ...
Performance Issues in the Design of Hierarchical-ring and Direct Networks for Shared-memory Multipro...
this paper we present an analytical model of a ring-based shared-memory multiprocessor operating the...
This paper compares the performance of hierar-chical ring- and mesh-connected wormhole routed shared...
A novel efficient bus architecture is presented together with an application. The bus architecture b...
We present a new analytical performance model of the IEEE P1596 Standard Coherent Interface, which i...
A parallel matrix multiplication algorithm is presented, and studies of its performance and estimati...
Approximate analytical queuing network models for expected message packet delay in 2-level and 3-lev...
Asynchronous packetswitched interconnection networks with decentralized control are very appropriate...
A shared memory multiprocessor having clusters of processing elements and memory modules is proposed...
grantor: University of TorontoThis dissertation explores performance issues in the design ...
A distributed system is a collection of computers that are connected via a communication network. Di...
This work deals with the performance evaluation of an MIMD distributed shared-memory parallel comput...