Verification of ILP Speedups in the 10's for Disjoint Eager Execution

Disjoint Eager Execution (DEE) has demonstrated Instruction Level Parallelism (ILP) speedups of a factor of 26 in simulations[20]. Theoretical and practical arguments verifying these gains are presented. This includes the use of Amdahl's Law, analysis of the partial trace of a detailed simulation of a SPECint92 benchmark, and analysis of the effect on cycle time of the scheduling hardware of the proposed Levo DEE-realization prototype. The static tree heuristic used to economically realize DEE in Levo is also examined. In particular, the shape of the tree is verified via formal proofs, and the variations in the dimensions of the tree with respect to available resources and branch predictor accuracy are modeled and studied. This work was supported in part by the Intel Corporation. This Revision (A) differs from the original paper substantially (with respect to Revision A) in the last two paragraphs of Section 2.2.1, all of Section 2.2.2, all of Section 2.3, all but the first paragrap..