In this paper, we propose a design exploration framework for architectural synthesis which can handle impreciseness occurred during the design process. The impreciseness may be caused by the lack of the exact knowledge about components which have not been completely designed down to the geometric level, manufacturing variances or ambiguity in accepting a particular design. We designed a polynomial-time scheduling algorithm which takes fuzziness of the timing of a system component into account, and efficiently constructs an effective schedule. The properties of the derived schedule is then used to infer the satisfactory of the design. Using a fuzzy rule-based system, one can easily justify the quality of the schedule without having an exact ...
Modern VLSI designs get increasingly complex and time-to-market constraints get tighter. Using high ...
This paper presents a design flow for timed asynchronous circuits. It introduces lazy transitions sy...
When synthesizing a hardware implementation from behavioral descriptions, an important decision is t...
With recent success in logic synthesis tools, many designers are focussing on capturing the design w...
Design is much easier when the design problem can be decomposed into small pieces that can be solved...
Journal ArticleThis paper describes a new method for architectural synthesis of timed asynchronous s...
: The decisions with the greatest importance and potential cost (if wrong) are made early in the eng...
A method for representing and manipulating imprecise and vague information in engineering design is ...
ABSTRACT: The decisions with the greatest importance and potential cost (if wrong) are made early in...
Preliminary design information is characteristically imprecise or fuzzy: specifications and requirem...
A shift is proposed in the design of VLSI circuits. In conventional design, higher levels of synthes...
One of the most compelling reasons for developing highlevel synthesis systems has been the desire to...
Many high level synthesis systems produce designs without any consideration for the underlying archi...
Due to the ad-hoc specication methodology, typical ASIC de-signs are highly unbalanced with respect ...
While technology scaling has presented many new and exciting opportunities, new design challenges ha...
Modern VLSI designs get increasingly complex and time-to-market constraints get tighter. Using high ...
This paper presents a design flow for timed asynchronous circuits. It introduces lazy transitions sy...
When synthesizing a hardware implementation from behavioral descriptions, an important decision is t...
With recent success in logic synthesis tools, many designers are focussing on capturing the design w...
Design is much easier when the design problem can be decomposed into small pieces that can be solved...
Journal ArticleThis paper describes a new method for architectural synthesis of timed asynchronous s...
: The decisions with the greatest importance and potential cost (if wrong) are made early in the eng...
A method for representing and manipulating imprecise and vague information in engineering design is ...
ABSTRACT: The decisions with the greatest importance and potential cost (if wrong) are made early in...
Preliminary design information is characteristically imprecise or fuzzy: specifications and requirem...
A shift is proposed in the design of VLSI circuits. In conventional design, higher levels of synthes...
One of the most compelling reasons for developing highlevel synthesis systems has been the desire to...
Many high level synthesis systems produce designs without any consideration for the underlying archi...
Due to the ad-hoc specication methodology, typical ASIC de-signs are highly unbalanced with respect ...
While technology scaling has presented many new and exciting opportunities, new design challenges ha...
Modern VLSI designs get increasingly complex and time-to-market constraints get tighter. Using high ...
This paper presents a design flow for timed asynchronous circuits. It introduces lazy transitions sy...
When synthesizing a hardware implementation from behavioral descriptions, an important decision is t...