SCI -- Scalable Coherent Interface -- is a new IEEE standard for specifying communicationbetween multiprocessors in a shared memory model. In this paper we model part of SCI by a program written in a UNITY-like programminglanguage. This part of SCI is formally specified in Manna and Pnueli's Linear Time Temporal Logic (LTL). We prove that the program satisfies its specification. The proof is carried out within LTL and uses history variables. Structuring of the proof is achieved by means of auxiliary predicates. 1. Introduction In this paper we formalize and verify part of the SCI (Scalable Coherent Interface) protocol [17]. This protocol is an IEEE standard for specifying communication between shared memory multiprocessors. It is call...
Multiprocessors in which a shared bus is used by the processors to com-municate with common memory a...
This paper gives a correctness proof for the on-chip COMA cache coherence protocol that supports the...
In this paper, we describe Teapot, a domain-specific language for writing cache coherence protocols....
SCI -- Scalable Coherent Interface -- is an IEEE standard for specifying communication between multi...
SCI – Scalable Coherent Interface – is a new IEEE stan-dard for specifying communicationbetween mult...
Abstract. SCI { Scalable Coherent Interface { is an IEEE standard for specify-ing communication betw...
Scalable Coherent Interface (SCI) is a bus defined by an IEEE working group. The purpose of SCI is t...
We specify a cache coherence protocol for cache-only shared memory multiprocessor architectures usin...
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cac...
As the number of NUMA system\u27s cache coherency protocols based on the IEEE Std. 1596-1992, Standa...
We apply techniques based on isotach logical time to the problem of maintaining a coherent shared me...
Cache coherence protocols of current shared-memory multiprocessors are difficult to verify. Our prev...
During the last few years many different memory consistency protocols have been proposed. These rang...
[[abstract]]A cache coherence protocol for a multiprocessor system. Each processor in the system has...
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Comput...
Multiprocessors in which a shared bus is used by the processors to com-municate with common memory a...
This paper gives a correctness proof for the on-chip COMA cache coherence protocol that supports the...
In this paper, we describe Teapot, a domain-specific language for writing cache coherence protocols....
SCI -- Scalable Coherent Interface -- is an IEEE standard for specifying communication between multi...
SCI – Scalable Coherent Interface – is a new IEEE stan-dard for specifying communicationbetween mult...
Abstract. SCI { Scalable Coherent Interface { is an IEEE standard for specify-ing communication betw...
Scalable Coherent Interface (SCI) is a bus defined by an IEEE working group. The purpose of SCI is t...
We specify a cache coherence protocol for cache-only shared memory multiprocessor architectures usin...
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cac...
As the number of NUMA system\u27s cache coherency protocols based on the IEEE Std. 1596-1992, Standa...
We apply techniques based on isotach logical time to the problem of maintaining a coherent shared me...
Cache coherence protocols of current shared-memory multiprocessors are difficult to verify. Our prev...
During the last few years many different memory consistency protocols have been proposed. These rang...
[[abstract]]A cache coherence protocol for a multiprocessor system. Each processor in the system has...
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Comput...
Multiprocessors in which a shared bus is used by the processors to com-municate with common memory a...
This paper gives a correctness proof for the on-chip COMA cache coherence protocol that supports the...
In this paper, we describe Teapot, a domain-specific language for writing cache coherence protocols....