Add to ORKGInterval diagram techniques have been applied successfully to symbolic formal verification of process networks, Petri nets, and timed automata, outperforming conventional approaches and avoiding some of their drawbacks. Our approach is based on a novel, efficient form of representation for multi-valued functions called interval decision diagram (IDD) and the corresponding image computation technique using interval mapping diagrams (IMDs). Besides formal verification, interval diagram techniques may be used to perform symbolic scheduling of heterogeneous embedded systems. IDDs and IMDs are presented, their properties are described, and the above applications are sketched
AbstractThe paper presents a diagrammatic representation of a standard interval space (the so-called...
Complex systems are often subjected to uncertainties that make its model difficult, if not impossibl...
Complex systems are often subjected to uncertainties that make its model difficult, if not impossi-b...
In this report, a representation of multi-valued functions called interval decision diagrams (IDDs) ...
Symbolic model checking tries to reduce the state explosion problem by implicit construction of the ...
In this report, we suggest interval diagram techniques for formal verification of timed automata. In...
In this paper, an approach to symbolic model checking of process networks is introduced. It is based...
In this paper, we suggest interval diagram techniques for formal verification of real-time systems m...
In this report, we suggest interval diagram techniques for formal verification of timed automata. I...
Symbolic verification has received much attention from both academia and industry in the past two de...
Abstract. This paper presents an Interval Decision Diagram based ap-proach to symbolic CSL model che...
Abstract. Timing diagrams are widely used in industrial practice to express precedence and timing re...
AbstractWe describe a novel methodology for analyzing timed systems symbolically. Given a formula re...
Abstract This paper describes a new data structure, difference decision diagrams (DDDs), for represe...
Abstract. We describe an algebra of Edge-Valued Decision Diagrams (EVMDDs) to encode arithmetic func...
AbstractThe paper presents a diagrammatic representation of a standard interval space (the so-called...
Complex systems are often subjected to uncertainties that make its model difficult, if not impossibl...
Complex systems are often subjected to uncertainties that make its model difficult, if not impossi-b...
In this report, a representation of multi-valued functions called interval decision diagrams (IDDs) ...
Symbolic model checking tries to reduce the state explosion problem by implicit construction of the ...
In this report, we suggest interval diagram techniques for formal verification of timed automata. In...
In this paper, an approach to symbolic model checking of process networks is introduced. It is based...
In this paper, we suggest interval diagram techniques for formal verification of real-time systems m...
In this report, we suggest interval diagram techniques for formal verification of timed automata. I...
Symbolic verification has received much attention from both academia and industry in the past two de...
Abstract. This paper presents an Interval Decision Diagram based ap-proach to symbolic CSL model che...
Abstract. Timing diagrams are widely used in industrial practice to express precedence and timing re...
AbstractWe describe a novel methodology for analyzing timed systems symbolically. Given a formula re...
Abstract This paper describes a new data structure, difference decision diagrams (DDDs), for represe...
Abstract. We describe an algebra of Edge-Valued Decision Diagrams (EVMDDs) to encode arithmetic func...
AbstractThe paper presents a diagrammatic representation of a standard interval space (the so-called...
Complex systems are often subjected to uncertainties that make its model difficult, if not impossibl...
Complex systems are often subjected to uncertainties that make its model difficult, if not impossi-b...