Code scheduling to exploit instruction level parallelism (ILP) is a critical problem in compiler optimization research, in light of the increased use of long-instruction-word machines. Unfortunately, optimum scheduling is computationally intractable, and one must resort to carefully crafted heuristics in practice. If the scope of application of a scheduling heuristic is limited to basic blocks, considerable performance loss may be incurred at block boundaries. To overcome this obstacle, basic blocks can be coalesced across branches to form larger regions such as super blocks. In the literature, these regions are typically scheduled using algorithms that are either oblivious to profile information (under the assumption that the process of fo...
Abstract. Code optimizations and restructuring transformations are typically applied before scheduli...
High performance computer architectures increasingly use compile-time instruction scheduling to reor...
Effective global instruction scheduling techniques have become an important component in modern comp...
Abstract. A compiler for VLIW and superscalar processors must expose sufficient instruction-level pa...
I hereby declare that I am the sole author of this thesis. This is a true copy of the thesis, includ...
This work examines the interaction of compiler scheduling techniques with processor features such as...
Abstract Profile-based optimizations can be used for instruction scheduling, loop scheduling, data p...
Path profiles record the frequencies of execution paths through a program. Until now, the best globa...
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in progra...
The available instruction level parallelism (ILP) is extremely limited within basic blocks of non-nu...
Dominator-path scheduling performs global instruction scheduling of paths in the dominator tree. Unl...
Instruction scheduling algorithms are used in compilers to reduce run-time delays for the compiled c...
Super-scalar processors can execute multiple instructions out-of-order per cycle and speculatively ...
The foremost goal of superscalar processor design is to increase performance through the exploitatio...
Instruction cache performance is very important for the overall performance of a computer. The place...
Abstract. Code optimizations and restructuring transformations are typically applied before scheduli...
High performance computer architectures increasingly use compile-time instruction scheduling to reor...
Effective global instruction scheduling techniques have become an important component in modern comp...
Abstract. A compiler for VLIW and superscalar processors must expose sufficient instruction-level pa...
I hereby declare that I am the sole author of this thesis. This is a true copy of the thesis, includ...
This work examines the interaction of compiler scheduling techniques with processor features such as...
Abstract Profile-based optimizations can be used for instruction scheduling, loop scheduling, data p...
Path profiles record the frequencies of execution paths through a program. Until now, the best globa...
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in progra...
The available instruction level parallelism (ILP) is extremely limited within basic blocks of non-nu...
Dominator-path scheduling performs global instruction scheduling of paths in the dominator tree. Unl...
Instruction scheduling algorithms are used in compilers to reduce run-time delays for the compiled c...
Super-scalar processors can execute multiple instructions out-of-order per cycle and speculatively ...
The foremost goal of superscalar processor design is to increase performance through the exploitatio...
Instruction cache performance is very important for the overall performance of a computer. The place...
Abstract. Code optimizations and restructuring transformations are typically applied before scheduli...
High performance computer architectures increasingly use compile-time instruction scheduling to reor...
Effective global instruction scheduling techniques have become an important component in modern comp...