Parallel graph reduction is a simple model for parallel program execution which uses the shared-memory abstraction for all communication and synchronisation between processors. Shared memory is used under a strict access regime with single assignment and blocking reads. In this paper we present the design of an efficient and accurate multiprocessor simulation scheme suitable to work with a parallel graph reducer and use the simulator to study the performance and pattern of access of a suite of benchmark programs. Threads are never migrated to another processor by the parallel graph reducer, and the effect of this scheduling policy is investigated. 1 Motivation and Overview Successful implementations of parallel graph reduction have been bu...
technical reportAn abstract machine suitable for parallel graph reduction on a shared memory multipr...
[[abstract]]In recent years, it has gradually become popular to use discrete-event simulation as a t...
Global simulation information is accessible on shared memory multiprocessors and can improve the eff...
Parallel graph reduction is a conceptually simple model for the concurrent evaluation of lazy functi...
Abstract. Parallel graph reduction is a model for parallel program exe-cution in which shared-memory...
This paper examines the cost/performance of simulating a hypothetical target parallel computer using...
The use of multiprocessors is an important way to increase the performance of a supercom-puting pr...
Algorithms operating on a graph setting are known to be highly irregular and un- structured. This le...
This thesis describes a method to simulate parallel programs written for shared memory multiprocesso...
textabstractParallel computation offers a challenging opportunity to speed up the time consuming enu...
Simulation has emerged as the primary means for evaluating the design of multiprocessor systems. Sim...
The performance of a computer system is important. One way of improving performance is to use multip...
We present a new technique for the parallel simulation of cache coherent shared memory multiprocess...
This paper deals with the performance evaluation of an organizational model for parallel graph reduc...
Chip-multiprocessor (CMP) architectures present a challenge for efficient simulation, combining the ...
technical reportAn abstract machine suitable for parallel graph reduction on a shared memory multipr...
[[abstract]]In recent years, it has gradually become popular to use discrete-event simulation as a t...
Global simulation information is accessible on shared memory multiprocessors and can improve the eff...
Parallel graph reduction is a conceptually simple model for the concurrent evaluation of lazy functi...
Abstract. Parallel graph reduction is a model for parallel program exe-cution in which shared-memory...
This paper examines the cost/performance of simulating a hypothetical target parallel computer using...
The use of multiprocessors is an important way to increase the performance of a supercom-puting pr...
Algorithms operating on a graph setting are known to be highly irregular and un- structured. This le...
This thesis describes a method to simulate parallel programs written for shared memory multiprocesso...
textabstractParallel computation offers a challenging opportunity to speed up the time consuming enu...
Simulation has emerged as the primary means for evaluating the design of multiprocessor systems. Sim...
The performance of a computer system is important. One way of improving performance is to use multip...
We present a new technique for the parallel simulation of cache coherent shared memory multiprocess...
This paper deals with the performance evaluation of an organizational model for parallel graph reduc...
Chip-multiprocessor (CMP) architectures present a challenge for efficient simulation, combining the ...
technical reportAn abstract machine suitable for parallel graph reduction on a shared memory multipr...
[[abstract]]In recent years, it has gradually become popular to use discrete-event simulation as a t...
Global simulation information is accessible on shared memory multiprocessors and can improve the eff...