The purpose of this paper is to reevaluate the performance of the Split Temporal/Spatial (STS) cache. First we briefly survey the split cache designs found in the open literature. Then we propose quantitative definitions for both temporal and spatial locality. These definitions can be used to represent each split cache design (or any other method for optimized locality exploitation) as a line in a temporal-spatial locality plane. Then we explain the particular process used to evaluate the STS cache design, and finally we present the results of that evaluation. We conclude with possible improvements pointed to by our evaluation results. Introduction In recent years, the speed gap between dynamic memories and microprocessors has been steadi...
Commercial link : http://www.springerlink.de/ ALCHEMY/http://www.springer.comCache memories were inv...
Since the introduction of cache memories in computer architecture, techniques to improve the data lo...
Recent research suggests that there are large variations in a cache's spatial usage, both within and...
This paper studies the theory of caching and temporal and spatial locality. We show the following re...
The widening gap between the processor clock speed and the memory latency puts an added pressure on ...
Current split data caches classify data as having either spatial locality or temporal locality. The...
Modern cache designs exploit spatial locality by fetching large blocks of data called cache lines on...
The performance of cache memories relies on the locality exhibited by programs. Traditionally this l...
We propose in this paper a new approach to study the temporal and spatial locality of codes using a ...
We propose in this paper a new approach to study the temporal and spatial locality of codes using a ...
As the issue widths of processors continue to increase, efficient data supply will become ever more ...
A scalar metric for temporal locality is proposed. The metric is based on LRU stack distance. This p...
Over the past decades, core speeds have been improving at a much higher rate than memory bandwidth. ...
Proceedings of the First PhD Symposium on Sustainable Ultrascale Computing Systems (NESUS PhD 2016)...
Locality, characterized by data reuses, determines caching performance. Reuse distance (i.e. LRU st...
Commercial link : http://www.springerlink.de/ ALCHEMY/http://www.springer.comCache memories were inv...
Since the introduction of cache memories in computer architecture, techniques to improve the data lo...
Recent research suggests that there are large variations in a cache's spatial usage, both within and...
This paper studies the theory of caching and temporal and spatial locality. We show the following re...
The widening gap between the processor clock speed and the memory latency puts an added pressure on ...
Current split data caches classify data as having either spatial locality or temporal locality. The...
Modern cache designs exploit spatial locality by fetching large blocks of data called cache lines on...
The performance of cache memories relies on the locality exhibited by programs. Traditionally this l...
We propose in this paper a new approach to study the temporal and spatial locality of codes using a ...
We propose in this paper a new approach to study the temporal and spatial locality of codes using a ...
As the issue widths of processors continue to increase, efficient data supply will become ever more ...
A scalar metric for temporal locality is proposed. The metric is based on LRU stack distance. This p...
Over the past decades, core speeds have been improving at a much higher rate than memory bandwidth. ...
Proceedings of the First PhD Symposium on Sustainable Ultrascale Computing Systems (NESUS PhD 2016)...
Locality, characterized by data reuses, determines caching performance. Reuse distance (i.e. LRU st...
Commercial link : http://www.springerlink.de/ ALCHEMY/http://www.springer.comCache memories were inv...
Since the introduction of cache memories in computer architecture, techniques to improve the data lo...
Recent research suggests that there are large variations in a cache's spatial usage, both within and...