Design of Fault Detection Module for Embedded Ram Memory

Abstract- Embedded RAMs are those whose address, data, and read/write controls cannot be directly controlled or observed through the chip’s 1/0 pins. Testing these memories, which are incorporated on a large percentage of VLSI devices are harder just because of the lack of controllability of its inputs and observe ability of its outputs. Testing such RAMs is the main objective of this paper. It is challenging to test embedded RAMs, and hence we will discuss techniques- design for testability (DFT) and built-in self test (BIST), which help in improving the testability of these RAMs. Keywords- Built-In Self Test (BIST), embedded memory fault, Modified March algorithm, Microcode, Transition fault, neighbourhood pattern sensitive faults(NPSF)