Delay Optimised 16 Bit Twin Precision Baugh Wooley Multiplier

Abstract- Multiplication is indeed the most crucial operation in digital signal processing (DSP). Its implementation requires large hardware resources and significantly affects the size, performance, and power consumption of a DSP system. Technique for 16 bit integer multiplication is implemented in this project.Baugh-Wooley algorithm is an algorithm used for the multiplication,delay and power dissipation can’t be reduced further in this type. Twin precision technique is noteworthy for its low power dissipation. Multiplier is adapted to bitwidth of the operands to be computed to obtain the reduced power dissipation. The technique also results in an increased computational throughput, by allowing several narrow-width operations to be computed in parallel. Using Twin-precision technique with Baugh-Wooley algorithm, we achieve significant optimized delay and good power reduction.The project describe how to apply the twin-precision technique also to signed multiplier schemes, such as Baugh Wooley. It is shown that the twinprecision delay penalty is small (5 % to 10 % and that a significant reduction in power dissipation (40 % to 70 % can be achieved,when operating on narrow-width operands. Index term- Baugh Wooley algorithm,Twin Precision technique I