A Novel Architecture Design & Characterization of CAM Controller IP Core with Replacement Policy

Abstract—Content Addressable Memory (CAM) is a special purpose Random Access Memory device that can be accessed by searching for data content. This paper describes a novel architecture design and characterization of a reusable soft IP core for CAM controller with sequential replacement policy, so as to improve the match ratio of the CAM memory. The proposed design was modeled using Verilog HDL and also prototyped in Xilinx ® SPARTAN family FPGA.The power analysis was done using XPower ® analyzer and the hardwar