Cost Efective and High Speed Design of DMA Memory Copy Accelerator

Abstract: Direct memory access (DMA) is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory independently of the central processing unit (CPU).Without DMA, when the CPU is using programmed input/output, it is typically fully occupied for the entire duration of the read or write operation, and is thus unavailable to perform other work. With DMA, the CPU initiates the transfer, does other operations while the transfer is in progress, and receives an interrupt from the DMA controller when the operation is done. This feature is useful any time the CPU cannot keep up with the rate of data transfer, or where the CPU needs to perform useful work while waiting for a relatively slow I/O data transfer. A Universal Asynchronous Receiver/Transmitter is a type of "asynchronous receiver/transmitter", a piece of computer hardware that translates data between parallel and serial forms. The universal designation indicates that the data format and transmission speeds are configurable and that the actual electric signaling levels and typically are handled by a special driver circuit external to the UART. A UART is usually an individual (or part of an) integrated circuit used for serial communications over a computer or peripheral device serial port. UARTs are now commonly included in microcontrollers. UART IP soft core based on DMA mode is proposed and well elaborated using the characteristic of DMA. The entire UART IP soft core in DMA mode mainly includes the following 5 sub-modules: UART send controller, UART Receive controller, Register file with the Interface of Avalon-MM Slave, Master Read type DMA controller with the interface of Avalon-MM Master and Master Write type DMA controller with the interface of Avalon-MM Master. The design of UART IP Soft Core based on DMA Mode is simulated using Modelsim tool, and synthesized using Xilinx tool. 1