Characterization of the First Prototype of TERA: A Readout ASIC for Ultra High Rate X-ray Detection Applications

This work reports the characterization results of the first prototype of TERA (Throughput Enhanced Readout ASIC), a multichannel analog readout ASIC suitable for detectors in ultra-high rate X-ray detection applications (>1Mcps/channel). The chip has been developed to process signals coming from Silicon Drift Detectors (SDDs) coupled to Charge Sensitive Amplifiers (CSA), such as CUBE. The first release of the chip is composed of 4 parallel readout channels, each channel is composed by 7th order semi-Gaussian shaping-amplifier with controllable shaping times and dynamic range, followed by a peak stretcher and an analog memory. A dedicated peak detector circuit and a novel pile-up rejection strategy have been also implemented. Each pair of channels is buffered by single-ended to differential op-amp and can be optionally digitized by 12-bit internal ADC, providing the maximum sampling rate of shaped pulse amplitudes of 2.5Mcps/channel. The first release of TERA has been fabricated and characterized, coupled with ARDESIA SDD-based detector module, to assess its performance in terms of energy resolution and throughput capability. In Fe-55 spectroscopy measurements, good energy resolution at low count rates has been verified and the measured throughput can reach 1.33Mcps/channel at the input count rate of 2.5Mcps/channel, comparable to the value obtained by a reference DPP