Database systems access memory either sequentially or randomly. Contrary to sequential access and despite the extensive efforts of computer architects, compiler writers, and system builders, random access to data larger than the processor cache has been synonymous to inefficient execution. Especially in the big data era, data processing is memory bound, and accesses to DRAM and non-volatile memory each take several tens or hundreds of nanoseconds respectively, posing a great challenge to current processors. Due to the mismatch between the way humans write code and the way processors execute this code, workload execution stalls on main memory access, instead of executing the other parallel work that typically exists in big data workloads. ...
Thesis for the degree of Licentiate of Engineering, a Swedish degree between M.Sc. and Ph.D. In toda...
The last two decade has witnessed two opposing hardware trends where the DRAM capacity and the acces...
Memory access time is a key factor limiting the performance of large-scale, shared-memory multiproce...
Concurrency control provides multi-user access to a database system, while ensuring concurrent trans...
During the last two decades, computer hardware has experienced remarkable developments. Especially C...
In the past decade, advances in speed of commodity CPUs have far out-paced advances in memory latenc...
The recent development of multi-core computer architectures has largely affected the creation of eve...
In the past decade, advances in speed of commodity CPUs have far out-paced advances in memory latenc...
textThis dissertation explores techniques for reducing the costs of inter-processor communication i...
The recent trend of multicore CPUs pushes for major changes in software development. Traditional sin...
This paper proposes a novel idea, called MiniTasking to reduce the number of cache misses by improvi...
Architects have adopted the shared memory model that implicitly manages cache coherence and cache ca...
Thesis (Ph. D.)--University of Rochester. Dept. of Computer Science, 2011.Computer architects have e...
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Comp...
Parallel programming has become increasingly important both as a programming skill and as a research...
Thesis for the degree of Licentiate of Engineering, a Swedish degree between M.Sc. and Ph.D. In toda...
The last two decade has witnessed two opposing hardware trends where the DRAM capacity and the acces...
Memory access time is a key factor limiting the performance of large-scale, shared-memory multiproce...
Concurrency control provides multi-user access to a database system, while ensuring concurrent trans...
During the last two decades, computer hardware has experienced remarkable developments. Especially C...
In the past decade, advances in speed of commodity CPUs have far out-paced advances in memory latenc...
The recent development of multi-core computer architectures has largely affected the creation of eve...
In the past decade, advances in speed of commodity CPUs have far out-paced advances in memory latenc...
textThis dissertation explores techniques for reducing the costs of inter-processor communication i...
The recent trend of multicore CPUs pushes for major changes in software development. Traditional sin...
This paper proposes a novel idea, called MiniTasking to reduce the number of cache misses by improvi...
Architects have adopted the shared memory model that implicitly manages cache coherence and cache ca...
Thesis (Ph. D.)--University of Rochester. Dept. of Computer Science, 2011.Computer architects have e...
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Comp...
Parallel programming has become increasingly important both as a programming skill and as a research...
Thesis for the degree of Licentiate of Engineering, a Swedish degree between M.Sc. and Ph.D. In toda...
The last two decade has witnessed two opposing hardware trends where the DRAM capacity and the acces...
Memory access time is a key factor limiting the performance of large-scale, shared-memory multiproce...