Ultra-Fast Functional Cache Modeling

Accurate cache and branch predictor simulation is a crucial factor when evaluating the performance and power consumption of a system. Usually, this is a complex and time-consuming task, therefore, simulators tend not to model any cache system by default due to practical constraints. This thesis project proposes a new way to collect data for the simulation of cache and branch predictor devices whose speedup is of orders of magnitude compared to existing Simics models while maintaining the same level of accuracy. A subset of benchmarks from SPEC CPU 2006 suite is used to investigate the effect of different data collection methods on the simulation's slowdown. The Simics simulator framework is heavily used by Intel and is used in this thesis work. It is a modular full-system simulator capable of simulating an entire system while running on the user developing environment. The newly developed Simics instrumentation framework, its API and the just-in-time (JIT) compiling technology are used and expanded. The aim is to implement new ways of collecting and sharing data between the new models and the simulated processor for minimum slowdown when computing statistics for cache and branch predictor models. The implemented cache model is on average 30 times faster and up to 40 times faster when compared to a simple but well tested and tuned sample cache model shipped with Simics. The same performance comparison can't be done for the newly modeled branch predictor since Simics currently does not model any branch predictor, however, it introduces minimum overhead, 1.4 on average, when compared to Simics running without any extension model. This new mechanism of collecting data for cache and branch predictor simulation makes it possible to run realistic workloads and at the same time collect cache and branch predictor statistics for live analysis while maintaining interactive user experience and overall keeping the simulation's slowdown extremely low