A seizure based power reduction SoC for wearable EEG In epilepsy

Epilepsy is one of the most common serious brain disorders affecting 1% of the world population. Epileptic seizure events are caused by abnormal excessive neuronal activity in the brain, which may be associated with behavioural changes that severely affect the patients’ quality of life. These events are manifested as abnormal activity in electroencephalography (EEG) recordings of individuals with epilepsy. This paper presents the on-chip implementation of an algorithm that, operating on the principle of data selection applied to seizures, would be able to reduce the power consumption of EEG devices, and consequently their size, thereby significantly increasing their usability. In order to reduce the power consumed by the on-chip implementation of the algorithm, mathematical approximations have been carried out to allow for an analog implementation, resulting in the power consumed by the system to be negligible in comparison to other blocks in an EEG device. The system has been fabricated in a 0.18 µm CMOS process, consumes 1.14 µW from a 1.25 V supply and achieves a sensitivity of 98.5% while only selecting 52.5% of the EEG data for transmission