Development of palladium nanowires

Inherent limitations of traditional lithography have prompted the search for means of achieving self-assembly of nano-scale structures and networks for the next generation of electronic and photonic devices. The nanowire, the basic building block of a nanocircuit, has recently become the focus of intense research. Reports on nanowire synthesis and assembly have appeared in the scientific literature, which include Vapor-Liquid-Solid mechanism, template-based electrochemical fabrication, solvothermal or wet chemistry, and assembly by fluid alignment or microchannel networks. An ideal approach for practical application of nanowires would circumvent technical and economic constraints of templating. Here we report on the self-assembly of highly-ordered metallic nanowires directly from a palladium acetate solution under an applied alternating current (AC) electric field of relatively high intensity and frequency. DNA-templated nanowires are first presented here. DNA molecules were stretched and positioned by electric field, followed by metallization by palladium acetate solution. Palladium nanowire arrays have been found to grow directly between microelectrodes without any template, under an alternating electric field of relatively high intensity and frequency. The wires grew spontaneously along the direction of the electric field and have high uniformity and conductivity. Single 75 nm-diameter palladium nanowires have also been self-assembled from aqueous solution at predefined locations between 15 μm-gap electrodes built on a SiO2 substrate. Nanowire assembly was initiated by application an electric field, and it occurred only along the direction of field lines where the field is strongest. Related metals did not support single nanowire assembly under comparable conditions. Current-limiting circuits for controlled nanowire synthesis, electric field simulation, and growth mechanism were studied. The simple and straightforward approach to nanowire assembly outlined here will provide a means of nano-/micro-scale device interconnection at precise positions at room temperature and good potential for device development, integration, and packaging