In this paper, hardware and software techniques are presented for improving the Throughput (defined as computations per dollar) of computing systems which are oriented towards high-precision floating point computations. The various improvements are referenced to a baseline of the PDP 11/20, the NOVA 1200, and the TI 960A, all 16 bit minicomputers. The most beneficial hardware improvement is the inclusion of a Floating Point Processor, which yields up to 200X Throughput increase over a software floating point package. The inclusion of a cache high speed local memory and the availability of Polish Notation format instructions are shown to provide less than a 5X increase each. The use of 48 bit data paths, numerous registers devoted to var...
Portability, an oftentimes sought-after goal in scientific applications, confers a number of possibl...
AbstractThis paper discusses the relationship between computer arithmetic and hardware implementatio...
Floating-point computing with more than one TFLOP of peak performance is already a reality in recent...
We disclose hardware (HW) intrinsic CPU or DSP instructions architecture and microarchitecture that ...
Nowadays, general-purpose processors are being used in scientific computing. However, whenhigh compu...
UnrestrictedWith recent technological advances, it has become possible to use reconfigurable hardwar...
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
This paper addresses the potential speedup achieved by using decimal floating-point hardware, instea...
Many computationally intensive scientific applications involve repetitive floating point operations ...
This project will investigate Field Programmable Gate Array (FPGA) technology in financial applicati...
Although the challenges to achieving petascale computing within the next decade are daunting, severa...
In recent years, the world of high performance computing has been developing rapidly. The goal of t...
It has been shown that FPGAs could outperform high-end microprocessors on floating-point computation...
The primary goal of the presented experiment was to judge the usefulness of FPGA technology in the s...
Tyt. z nagłówka.Pozostali autorzy artykułu: Ernest Jamro, Paweł Russek, Kazimierz Wiatr.Bibliogr. s....
Portability, an oftentimes sought-after goal in scientific applications, confers a number of possibl...
AbstractThis paper discusses the relationship between computer arithmetic and hardware implementatio...
Floating-point computing with more than one TFLOP of peak performance is already a reality in recent...
We disclose hardware (HW) intrinsic CPU or DSP instructions architecture and microarchitecture that ...
Nowadays, general-purpose processors are being used in scientific computing. However, whenhigh compu...
UnrestrictedWith recent technological advances, it has become possible to use reconfigurable hardwar...
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
This paper addresses the potential speedup achieved by using decimal floating-point hardware, instea...
Many computationally intensive scientific applications involve repetitive floating point operations ...
This project will investigate Field Programmable Gate Array (FPGA) technology in financial applicati...
Although the challenges to achieving petascale computing within the next decade are daunting, severa...
In recent years, the world of high performance computing has been developing rapidly. The goal of t...
It has been shown that FPGAs could outperform high-end microprocessors on floating-point computation...
The primary goal of the presented experiment was to judge the usefulness of FPGA technology in the s...
Tyt. z nagłówka.Pozostali autorzy artykułu: Ernest Jamro, Paweł Russek, Kazimierz Wiatr.Bibliogr. s....
Portability, an oftentimes sought-after goal in scientific applications, confers a number of possibl...
AbstractThis paper discusses the relationship between computer arithmetic and hardware implementatio...
Floating-point computing with more than one TFLOP of peak performance is already a reality in recent...