Substrate noise coupling in a complex mixed signal integrated circuit

In order to continue shrinking the size of electronic devices, it has become necessary to integrate both analog and digital components on a signle substrate to form a mixed signal integrated circuit. With this tight integration has come the problem of substrate noise coupling between the devices on the substrate. Research has been done to examine the effect of this coupling in simple test structures, but as yet no complex circuits have been tested. In this work, the relatively complex Digital Phased-Locked Loop will be stimulated with several different substrate models to see what effect substrate coupling has on the functioning of the circuit. The simulations involve the comparison of lightly doped and heavily doped substrates using both Silicon on Insulator and Capcitive Guard Ring noise reduction techniques. Circuits are tested at both high and low frequency. The high level performance characteristics such as lock time and pull-in time are compared, as well as some low level circuit characteristics. The results indicate a complex situation with some components of the circuit being affected more by the substrate coupling, and some sub-circuits having a greater effect on the high level performance of the overall circuit. Recommendations have been made as to what substrate reduction techniques were best in what types of situations