Hardware aware tiling optimization for multi-core systems

This paper presents a proposition of the new tool which improves tiling efficiencyfor given hardware architecture. This article also describes the correlationbetween changing hardware architecture and methods of software optimization.First chapter includes short description of the change in hardware architecturewhich has occurred in recent 10 years. The second chapter provides an overviewof tools which will be used in further research. The consecutive sections containdescription of proposed hardware-aware tool for optimal tiling