科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム
Differential power analysis (DPA) has become a major concern for system security. To achieve a high ...
Differential power analysis (DPA) has become a major concern for system security. To achieve a high ...
The objective of the project was to explore the various differential logic families in the literatur...
科研費報告書収録論文(課題番号:09558027・基盤研究(B)(2)・H9～H12/研究代表者:羽生, 貴弘/1トランジスタセル多値連想メモリの試作とその応用
科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム
科研費報告書収録論文(課題番号:13558026・基盤研究(B)(2)・13～16/研究代表者:羽生, 貴弘/転送ボトルネックフリー多値ロジックインメモリVLSIの開発と応用
科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム
科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム
A new multiple-valued circuit based on dual-rail differential logic is proposed for crosstalk noise ...
A new asynchronous data transfer scheme using multiple-valued 2-color 1-phase coding, called a bidi-...
ISBN: 0818638303The theory of digital self-checking circuits has been developed in order to make for...
This work examines the inherent self-checking property of a latch-free dynamic asynchronous datapath...
The development of modern integration technologies is normally driven by the needs of digital CMOS c...
Differential power analysis (DPA) has become a major system security concern. To achieve high levels...
This thesis presents a self-restored current-mode CMOS multiple-valued logic (MVL) design architectu...
Differential power analysis (DPA) has become a major concern for system security. To achieve a high ...
Differential power analysis (DPA) has become a major concern for system security. To achieve a high ...
The objective of the project was to explore the various differential logic families in the literatur...
科研費報告書収録論文(課題番号:09558027・基盤研究(B)(2)・H9～H12/研究代表者:羽生, 貴弘/1トランジスタセル多値連想メモリの試作とその応用
科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム
科研費報告書収録論文(課題番号:13558026・基盤研究(B)(2)・13～16/研究代表者:羽生, 貴弘/転送ボトルネックフリー多値ロジックインメモリVLSIの開発と応用
科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム
科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム
A new multiple-valued circuit based on dual-rail differential logic is proposed for crosstalk noise ...
A new asynchronous data transfer scheme using multiple-valued 2-color 1-phase coding, called a bidi-...
ISBN: 0818638303The theory of digital self-checking circuits has been developed in order to make for...
This work examines the inherent self-checking property of a latch-free dynamic asynchronous datapath...
The development of modern integration technologies is normally driven by the needs of digital CMOS c...
Differential power analysis (DPA) has become a major system security concern. To achieve high levels...
This thesis presents a self-restored current-mode CMOS multiple-valued logic (MVL) design architectu...
Differential power analysis (DPA) has become a major concern for system security. To achieve a high ...
Differential power analysis (DPA) has become a major concern for system security. To achieve a high ...
The objective of the project was to explore the various differential logic families in the literatur...
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