Implementation of direct torque control of brushless DC motor utilizing digital signal processor

This thesis presents the implementation of Direct Torque Control (DTC) of Brushless DC (BLDC) motor drive using a dSPACE DSP DS1104. BLDC motor is well-known and has been widely used in the industrial area due to its high speed and power density capabilities. Electronic commutation is by far more favourable compared to the conventional method, which uses brushes and commutators, that wear and tear by time. However, a precise controller is required in order to control the switches prior to commutation process. Over the past years, DTC method for induction motor drives received lots of attention from researchers, and motor drive industries. Its simple control structure uses a pair of hysteresis controller, torque and flux estimator, switching table and a three phase voltage source inverter. In DTC, torque and flux are controlled independently to satisfy the demands using optimum voltage vectors. The conventional Field Oriented Control (FOC) drive controls the torque and flux from the current components which being produced, and more machine parameters and current regulated Pulse Width Modulation are required. DTC of BLDC combines a simple control method and a demanding motor to complete a better drives system. DTC method is known to have a simple structure without having complex calculations thus offers a fast response and a good dynamic performance. The drawbacks of the conventional DTC are having high-torque ripple and variable switching frequency. A mathematical modeling which is created using MATLAB simulation on the motor drive for BLDC Motor is presented along with a complete model of the DTC system for BLDC motor with trapezoidal back EMF waveform using SIMULINK block. The model is described briefly to give a better understanding on the whole system. FPGA is used to perform blanking time generation which the main priority in performing this task is to avoid short circuit within the legs of VSI and a blanking time about 2μs is implemented for each leg. The usage of dSPACE is fully utilized which is used to minimize the system sampling time up to 50μs. Finally, the simulation and experimental results are shown to validate the performance of DTC of BLDC motor