This paper introduces a fully digital pulse-width-modulation (PWM) based calibration technique intended to dynamically compensate the input offset voltage due to process and mismatch in Ultra Low Voltage (ULV) Digital-Based Operational Transconductance Amplifiers (DB-OTA). Post-layout simulations on a DB-OTA circuit in 180nm featuring the proposed calibration technique demonstrate that process and mismatch related offset voltage can be effectively compensated by varying the duty cycle of a square wave signal with minimum performance overhead. The proposed OTA consumes just 7.34nW while driving a capacitive load of 80pF with a Total Harmonic Distortion lower than 2.26% at 100mV input signal swing. The total silicon area is 1,700 um^2
special issue in one of the Eurasip journals (Hindawi Publishing Corporation)International audienceA...
This paper deals with the measurement of input offset voltage of a fully differential low-voltage va...
This work describes a new topology for CMOS sample-and-hold circuits in low voltage with self-correc...
The calibration of the effects of process variations and device mismatch in Ultra Low Voltage (ULV) ...
An ultra-low voltage and ultra-low power Digital-Based Operational Transconductance Amplifier (DB-OT...
The calibration of the effects of process variations and device mismatch in Ultra Low Voltage (ULV) ...
In this paper, an Analog and a Digital-Based Operational Transconductance Amplifier (OTA) in a 800nm...
Systems using integrators with very long time constants can place a severe constraint on allowable a...
This article deals with the calibration method of analog integrated circuits (ICs) designed in CMOS ...
2011 International Conference on Solid State Devices and Materials (SSDM 2011), September 28-30, 201...
In this paper, we describe the development of a circuit system that enables the offset calibration o...
This work identifies properties and behaviours of a differential operational transconductance amplif...
In this paper, an on-chip self-calibrated 8-bit R-2R digital-to-analog converter (DAC) based on digi...
[[abstract]]The authors propose a pulse width modulator (PWM) for a hearing instrument (hearing aid)...
An automatic offset compensation scheme for 2 stages operational amplifier is described. The present...
special issue in one of the Eurasip journals (Hindawi Publishing Corporation)International audienceA...
This paper deals with the measurement of input offset voltage of a fully differential low-voltage va...
This work describes a new topology for CMOS sample-and-hold circuits in low voltage with self-correc...
The calibration of the effects of process variations and device mismatch in Ultra Low Voltage (ULV) ...
An ultra-low voltage and ultra-low power Digital-Based Operational Transconductance Amplifier (DB-OT...
The calibration of the effects of process variations and device mismatch in Ultra Low Voltage (ULV) ...
In this paper, an Analog and a Digital-Based Operational Transconductance Amplifier (OTA) in a 800nm...
Systems using integrators with very long time constants can place a severe constraint on allowable a...
This article deals with the calibration method of analog integrated circuits (ICs) designed in CMOS ...
2011 International Conference on Solid State Devices and Materials (SSDM 2011), September 28-30, 201...
In this paper, we describe the development of a circuit system that enables the offset calibration o...
This work identifies properties and behaviours of a differential operational transconductance amplif...
In this paper, an on-chip self-calibrated 8-bit R-2R digital-to-analog converter (DAC) based on digi...
[[abstract]]The authors propose a pulse width modulator (PWM) for a hearing instrument (hearing aid)...
An automatic offset compensation scheme for 2 stages operational amplifier is described. The present...
special issue in one of the Eurasip journals (Hindawi Publishing Corporation)International audienceA...
This paper deals with the measurement of input offset voltage of a fully differential low-voltage va...
This work describes a new topology for CMOS sample-and-hold circuits in low voltage with self-correc...