This paper analyzes the generation and the propagation in system-on-chips of the switching noise due to embedded core logic blocks. Such disturbances contribute to degrade the performance of the other on-chip circuits and cause unwanted electromagnetic emission. These parasitic effects can be largely ascribed to the steep currents that flow into the power supply interconnects of the core logic blocks and to the parasitic coupling of the system-on-chip building blocks through the silicon substrate they share. In this work it is shown that the substrate voltage bounce due to the switching noise can be significantly attenuated if conventional low-impedance DC power supplies are replaced by high-impedance one. The effectiveness of the propose...
Substrate noise injection is evaluated for a 0.25-µm CMOS technology, to determine the mechanisms th...
This paper reports a novel simulation methodology for analysis and prediction of substrate noise imp...
Substrate noise injection is evaluated for a 0.25-µm CMOS technology, to determine the mechanisms th...
This paper analyzes the generation and the propagation in system-on-chips of the switching noise due...
Board-level I/Os signal integrity and conducted EMI have become a critical concern for high-speed ci...
Abstract—Substrate noise is a major obstacle for mixed-signal integration. Ground bounce is a major ...
As VLSI technology advances to gigascale integration, billions of transistors will be packed on a si...
International audienceIn order to merge low power and high voltage devices on the same chip at compe...
International audienceIn order to merge low power and high voltage devices on the same chip at compe...
Integrated systems are becoming so complex, it is extremely difficult for designers to simulate full...
The paper deals with the propagation of EMI in Smart Power SoCs through high frequency parasitic pat...
Graduation date: 1997Substrate switching noise is becoming a concern as integrated circuits get larg...
Reducing the interconnect size with each technology node and increasing speed with each generation i...
Abstract:- Substrate noise effects caused by the integration of a DC-DC converter into a 0.13 µm CMO...
Substrate noise injection is evaluated for a 0.25-µm CMOS technology, to determine the mechanisms th...
Substrate noise injection is evaluated for a 0.25-µm CMOS technology, to determine the mechanisms th...
This paper reports a novel simulation methodology for analysis and prediction of substrate noise imp...
Substrate noise injection is evaluated for a 0.25-µm CMOS technology, to determine the mechanisms th...
This paper analyzes the generation and the propagation in system-on-chips of the switching noise due...
Board-level I/Os signal integrity and conducted EMI have become a critical concern for high-speed ci...
Abstract—Substrate noise is a major obstacle for mixed-signal integration. Ground bounce is a major ...
As VLSI technology advances to gigascale integration, billions of transistors will be packed on a si...
International audienceIn order to merge low power and high voltage devices on the same chip at compe...
International audienceIn order to merge low power and high voltage devices on the same chip at compe...
Integrated systems are becoming so complex, it is extremely difficult for designers to simulate full...
The paper deals with the propagation of EMI in Smart Power SoCs through high frequency parasitic pat...
Graduation date: 1997Substrate switching noise is becoming a concern as integrated circuits get larg...
Reducing the interconnect size with each technology node and increasing speed with each generation i...
Abstract:- Substrate noise effects caused by the integration of a DC-DC converter into a 0.13 µm CMO...
Substrate noise injection is evaluated for a 0.25-µm CMOS technology, to determine the mechanisms th...
Substrate noise injection is evaluated for a 0.25-µm CMOS technology, to determine the mechanisms th...
This paper reports a novel simulation methodology for analysis and prediction of substrate noise imp...
Substrate noise injection is evaluated for a 0.25-µm CMOS technology, to determine the mechanisms th...