Leakage power reduction in nano-CMOS designs has gained tremendous interest both in academia and industry. Many techniques have been proposed in the literature for leakage power reduction and one of the prominent techniques for leakage power reduction is the use of sleep transistors as power-gating elements to cut-off sub-threshold leakage current in circuits when they are in stand-by mode. Although sleep transistor insertion is very effective in cutting-off leakage, it also incurs timing, area and routing overhead. Since most of the sleep transistor insertion methodologies do post layout insertion, care should be taken such that there is minimal perturbation of the original layout. Over design of sleep transistors cells and sub-optimal sle...
Optimum power gating sleep transistor design and implementation are critical to a successful low-pow...
[[abstract]]Power Gating is effective for reducing leakage power. Previously, a Distributed Sleep Tr...
Abstract Fine-grain sleep transistor insertion (FGSTI) technique is easier to guarantee circuit func...
Leakage power reduction in nano-CMOS designs has gained tremendous interest both in academia and in...
Leakage power has become a serious concern in nanometer CMOS technologies, and power-gating has show...
This paper introduces a new approach to sub-threshold leakage power reduction in CMOS circuits. Our ...
Leakage power has grown significantly and is a major challenge in SoC design. Among SoC's compo...
The use of sleep transistors as power-gating elements to cut-off sub-threshold leakage stand-by curr...
A very popular approach for leakage power reduction is today represented by the adoption of emerging...
Clustered sleep transistor insertion is an effective leakage power reduction technique that is well-...
With the growing scaling of technology, leakage power dissipation has become a critical issue of VLS...
[[abstract]]One of the effective techniques to reduce leakage power is power gating. Previously, a D...
[[abstract]]Power gating is one of the most effective ways to reduce leakage power. In this paper, w...
In this paper we focus on leakage reduction through automatic insertion of sleep transistors using a...
[[abstract]]Power Gating is effective for reducing leakage power. Previously, a Distributed Sleep Tr...
Optimum power gating sleep transistor design and implementation are critical to a successful low-pow...
[[abstract]]Power Gating is effective for reducing leakage power. Previously, a Distributed Sleep Tr...
Abstract Fine-grain sleep transistor insertion (FGSTI) technique is easier to guarantee circuit func...
Leakage power reduction in nano-CMOS designs has gained tremendous interest both in academia and in...
Leakage power has become a serious concern in nanometer CMOS technologies, and power-gating has show...
This paper introduces a new approach to sub-threshold leakage power reduction in CMOS circuits. Our ...
Leakage power has grown significantly and is a major challenge in SoC design. Among SoC's compo...
The use of sleep transistors as power-gating elements to cut-off sub-threshold leakage stand-by curr...
A very popular approach for leakage power reduction is today represented by the adoption of emerging...
Clustered sleep transistor insertion is an effective leakage power reduction technique that is well-...
With the growing scaling of technology, leakage power dissipation has become a critical issue of VLS...
[[abstract]]One of the effective techniques to reduce leakage power is power gating. Previously, a D...
[[abstract]]Power gating is one of the most effective ways to reduce leakage power. In this paper, w...
In this paper we focus on leakage reduction through automatic insertion of sleep transistors using a...
[[abstract]]Power Gating is effective for reducing leakage power. Previously, a Distributed Sleep Tr...
Optimum power gating sleep transistor design and implementation are critical to a successful low-pow...
[[abstract]]Power Gating is effective for reducing leakage power. Previously, a Distributed Sleep Tr...
Abstract Fine-grain sleep transistor insertion (FGSTI) technique is easier to guarantee circuit func...