A P1500-compatible programmable BIST approach for the test of embedded flash memories

In this paper we present a microprocessor-based approach suitable for embedded flash memory testing in a System-on-a-chip (SoC) environment. The main novelty of the approach is the high flexibility, which guarantees easy exploitation of the same architecture to different memory cores. The proposed approach is compatible with the P1500 standard. A case study has been developed and demonstrates the advantages of the proposed core test strategy in terms of area overhead and test application time