In this work we present a full analog turbo decoder for hard-disk EPR-IV read channels in CMOS technology. The design is based on a current-mode approach developed by Loeliger et al. [2001], for the analog implementation of sum-product algorithms. The circuit's main attractions are the coding gain offered by turbo codes over the uncoded EPR-IV channel, and the relative simplicity and power efficiency of the analog approach over the digital approach. The circuit is developed in a 0.18 μm CMOS technology and operates at a 1.8 V power supply, with a total simulated power consumption (including peripheral circuitry) of about 650 mW at 400 Mb/s
International audienceBased on multiple-slice turbo codes, a novel semi-iterative analog turbo decod...
The introduction of turbo codes in 1993 was a breakthrough in constructing error correction codes th...
Abstract—Error correcting decoder’s performance is crucial for communication systems. Since the perf...
In this work we present a full analog turbo decoder for hard-disk EPR-IV read channels in CMOS techn...
In this paper, we discuss the design and testing results of an analog 0.35 μm CMOS Turbo decoder for...
This work presents the design and the test results of an analog decoder for the 40-bit block length,...
A novel current-mode approach is proposed for implementing basic building blocks of an analog iterat...
In this paper, a novel current-mode approach is proposed for implementing basic building blocks of a...
This work presents the design and the test results of an analog decoder for the 40-bit block length,...
In this paper, a novel current-mode approach is proposed for implementing basic building blocks of a...
Abstract — The design and test results of a three-metal, double-poly, 0.35 µm CMOS analog turbo deco...
This paper presents an all-analog iterative decoding network for an EPR4 magnetic recording system. ...
This paper presents an all-analog iterative decoding network for an EPR4 magnetic recording system. ...
In this paper, we present an all-analog implementation of the rate-1/3, block length 40, universal m...
Current-mode circuits are presented for implementing analog min-sum (MS) iterative decoders. These d...
International audienceBased on multiple-slice turbo codes, a novel semi-iterative analog turbo decod...
The introduction of turbo codes in 1993 was a breakthrough in constructing error correction codes th...
Abstract—Error correcting decoder’s performance is crucial for communication systems. Since the perf...
In this work we present a full analog turbo decoder for hard-disk EPR-IV read channels in CMOS techn...
In this paper, we discuss the design and testing results of an analog 0.35 μm CMOS Turbo decoder for...
This work presents the design and the test results of an analog decoder for the 40-bit block length,...
A novel current-mode approach is proposed for implementing basic building blocks of an analog iterat...
In this paper, a novel current-mode approach is proposed for implementing basic building blocks of a...
This work presents the design and the test results of an analog decoder for the 40-bit block length,...
In this paper, a novel current-mode approach is proposed for implementing basic building blocks of a...
Abstract — The design and test results of a three-metal, double-poly, 0.35 µm CMOS analog turbo deco...
This paper presents an all-analog iterative decoding network for an EPR4 magnetic recording system. ...
This paper presents an all-analog iterative decoding network for an EPR4 magnetic recording system. ...
In this paper, we present an all-analog implementation of the rate-1/3, block length 40, universal m...
Current-mode circuits are presented for implementing analog min-sum (MS) iterative decoders. These d...
International audienceBased on multiple-slice turbo codes, a novel semi-iterative analog turbo decod...
The introduction of turbo codes in 1993 was a breakthrough in constructing error correction codes th...
Abstract—Error correcting decoder’s performance is crucial for communication systems. Since the perf...