Hardware design and synthesis of QR decomposition of a matrix using VHDL

The main objective of this report is to implement QR Decomposition of a matrix by using VHDL. Inversion is a common operation in many signal processing problems. Inverse of a given matrix can be obtained using different mathematical methods. In order to find the inverse of a matrix using QR Decomposition method, an appropriate algorithm must be selected. Modified Gram Schmidt algorithm is selected by analyzing the computational requirements. The mathematical method of calculating the QR Decomposition of a matrix using Modified Gram Schmidt Algorithm is selected, and then suitably converted into VHDL code. The code is simulated using a set of test matrices using Xilinx14.6 software. The code is tested for synthesis to obtain RTL logic. Hardware implementation of QR decomposition of a 64x64 matrix is done using Artix7 XC7A100T device. The minimum period and maximum frequency is observed to be 88.96ns and11.24MHz