HSPICE compatible modeling and performance analysis of Carbon Nanotube Field Effect Transistors

Scaling down of Semiconductor Devices in nanometer range has been almost stagnated due to various obstacles faced such as decrease in trans-conductance, source to drain tunneling, gate oxide current leakage, increase in propagation delay, less control over gate region, device mismatch and mobility degradation. Research is continuously in progress to implement Carbon Nanotubes (CNT) in Field Effect Transistor (FET) known as Carbon Nanotube Field Effect Transistor (CNFET). It is found that CNFET based digital circuits could enhance the performance over regular Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) like better channel control, increase in current density and electron mobility, better threshold voltage and increase in trans-conductance. This thesis work provides detailed explanation of properties of Carbon Nanotubes and study of the Model of CNFETs which is implemented in HSPICE. Digital circuit using this model is tested for its performance and is compared with performance of similar MOSFET circuit. Other research progresses in this field are studied and the present simulation results are verified