Add to ORKGDesign of high performance hardware and software based gate-switch level logic simulators requires knowledge about the logic simulation process itself. Unfortunately, little data is publically available concerning key aspects of this process. An example of this is the lack of published empirical measurements relating to the time distribution of events generated by such simulators. This paper presents a gate-switch level logic simulator lsim which is oriented towards the collection of data about the simulation process. The basic components of lsim are reviewed, and its relevant data gathering facilities are discussed. An example is presented which illustrates the use of lsim in gathering data on event distributions and on communications requ...
The notion of logical processes is a widely used modeling paradigm in parallel and distributed discr...
A timing simulator, called TIMSIM, has been developed which performs gate level simulation of simple...
A number of recent articles have focused on the design of high speed discrete-event simulation (DES)...
The high costs associated with logic simulation of large VLSI based systems have led to the need for...
The high costs associated with logic simulation of large VLSI based systems have led to the need for...
Lsim is a gate/switch level digital logic similar. It enables users to model digital circuits both a...
The high costs associated with logic simulation of large VLSI based circuits has led to the need for...
Lsim2 is gate/switch-level digital logic simulator. It enables users to model digital circuits both ...
Gate level simulators are those which simulate digital logic circuits composed only of basic gates s...
Gate level simulators are those which simulate digital logic circuits composed only of basic gates s...
Gate level simulation is a necessary step to verify the correctness of a circuitdesign before fabric...
This report discusses properties of event oriented logic simulators that employ the technique of sel...
Circuit Simulation is a critical bottleneck in VLSI design. This paper describes a parallel switch-l...
This report discusses properties of event oriented logic simulators that employ the technique of sel...
A timing simulator, called TIMSIM, has been developed which performs gate level simulation of simple...
The notion of logical processes is a widely used modeling paradigm in parallel and distributed discr...
A timing simulator, called TIMSIM, has been developed which performs gate level simulation of simple...
A number of recent articles have focused on the design of high speed discrete-event simulation (DES)...
The high costs associated with logic simulation of large VLSI based systems have led to the need for...
The high costs associated with logic simulation of large VLSI based systems have led to the need for...
Lsim is a gate/switch level digital logic similar. It enables users to model digital circuits both a...
The high costs associated with logic simulation of large VLSI based circuits has led to the need for...
Lsim2 is gate/switch-level digital logic simulator. It enables users to model digital circuits both ...
Gate level simulators are those which simulate digital logic circuits composed only of basic gates s...
Gate level simulators are those which simulate digital logic circuits composed only of basic gates s...
Gate level simulation is a necessary step to verify the correctness of a circuitdesign before fabric...
This report discusses properties of event oriented logic simulators that employ the technique of sel...
Circuit Simulation is a critical bottleneck in VLSI design. This paper describes a parallel switch-l...
This report discusses properties of event oriented logic simulators that employ the technique of sel...
A timing simulator, called TIMSIM, has been developed which performs gate level simulation of simple...
The notion of logical processes is a widely used modeling paradigm in parallel and distributed discr...
A timing simulator, called TIMSIM, has been developed which performs gate level simulation of simple...
A number of recent articles have focused on the design of high speed discrete-event simulation (DES)...