Virtualization of custom logic computations (i.e., by sharing a fixed function across distinct data streams) provides a means of reusing hardware resources, particularly when resources are limited. This is common practice in traditional processors where more than one user can share processor resources. In this paper, we virtualize a custom logic block using C-slow techniques to support fine-grain context-switching. We then develop and present an analytic model for several performance measures (throughput, latency, input queue occupancy) for both fine-grained and coarse-grained context switching (to a secondary memory). Next, we calibrate the analytic performance model with empirical measurements. We then validate the model via discrete-even...
Compilation techniques such as those portrayed by the Warren Abstract Machine(WAM) have greatly impr...
General purpose parallel processing machines are increasingly being used to speed up a variety of VL...
In contrast to processors, current reconfigurable devices totally lack programming models that woul...
Virtualization of custom logic computations (i.e., by sharing a fixed function across distinct data ...
Virtualization of custom logic computations (i.e., by sharing a fixed function across distinct data ...
Data files supporting paper. Paper abstract: Visualization of logic computations (i.e., by sharing a...
The high costs associated with logic simulation of large VLSI based systems have led to the need for...
The high costs associated with logic simulation of large VLSI based systems have led to the need for...
The high costs associated with logic simulation of large VLSI based circuits has led to the need for...
In this article, we developed a massively parallel gate-level logical simulator to address the ever-...
Modern VLSI technology has changed the economic rules by which the balance between processing power...
Fast, efficient logic simulators are an essential tool in modern VLSI system design. Logic simulatio...
Design of high performance hardware and software based gate-switch level logic simulators requires k...
In this work, a model of computation for shared memory parallelism is presented. To address fundamen...
The Chandy-Misra-Bryant (CMB) model has been applied to logic simulation of synchronous sequential c...
Compilation techniques such as those portrayed by the Warren Abstract Machine(WAM) have greatly impr...
General purpose parallel processing machines are increasingly being used to speed up a variety of VL...
In contrast to processors, current reconfigurable devices totally lack programming models that woul...
Virtualization of custom logic computations (i.e., by sharing a fixed function across distinct data ...
Virtualization of custom logic computations (i.e., by sharing a fixed function across distinct data ...
Data files supporting paper. Paper abstract: Visualization of logic computations (i.e., by sharing a...
The high costs associated with logic simulation of large VLSI based systems have led to the need for...
The high costs associated with logic simulation of large VLSI based systems have led to the need for...
The high costs associated with logic simulation of large VLSI based circuits has led to the need for...
In this article, we developed a massively parallel gate-level logical simulator to address the ever-...
Modern VLSI technology has changed the economic rules by which the balance between processing power...
Fast, efficient logic simulators are an essential tool in modern VLSI system design. Logic simulatio...
Design of high performance hardware and software based gate-switch level logic simulators requires k...
In this work, a model of computation for shared memory parallelism is presented. To address fundamen...
The Chandy-Misra-Bryant (CMB) model has been applied to logic simulation of synchronous sequential c...
Compilation techniques such as those portrayed by the Warren Abstract Machine(WAM) have greatly impr...
General purpose parallel processing machines are increasingly being used to speed up a variety of VL...
In contrast to processors, current reconfigurable devices totally lack programming models that woul...