The Field-programmable Port eXtender (FPX) provides dynamic, fast, and flexible mechanisms to process data streams at the ports of the Washington University Gigabit Switch (WUGS-20). In order to facilitate the design and implementation of portable hardware modules for the Reprogrammable Application Device (RAD) on the FPX board, infrastructure components have been developed. These components abstract application module designers from device-specific timing specifications of off-chip memory devices, as well as processing system-level control cells. This document describes the design and internal functionality of the infrastructure components and is intended as a reference for future component revisions and additions. Application module desig...
Because of its flexibility and high performance, reconfigurable logic functions implemented on the Fie...
A library of layered protocol wrappers has been developed that process Internet packets in reconfigu...
This report covers the implementation of digital system design using Field Programmable Gate Array (...
The Field-programmable Port eXtender (FPX) provides dynamic, fast, and flexible mechanisms to proces...
This manual summarizes how to insert the Field Programmable Port Extender (FPX) into the Washington ...
A prototype platform has been developed that allows pro-cessing of packets at the edge of a multi-gi...
While hardware plugins are well suited for processing data with high throughput, software plugins ar...
This document describes the design and functionality of the hardware components implemented in the F...
Reconfigurable hardware platforms are the key to extensible high speed networks. They provide flexib...
The ongoing increases of line speed in the Internet backbone combined with the need for increased fu...
The FPX provides simple and fast mechanisms to process cells or packets. By performing all computati...
An instructional platform has been developed that allows rapid prototype of network packet processin...
The ongoing increases of line speed in the Internet backbone combined with the need for increased fu...
This paper provides a tutorial survey of architectures of commercially available high-capacity field...
The ongoing exponential increase of line speed in the Internet and combined with the uncountable req...
Because of its flexibility and high performance, reconfigurable logic functions implemented on the Fie...
A library of layered protocol wrappers has been developed that process Internet packets in reconfigu...
This report covers the implementation of digital system design using Field Programmable Gate Array (...
The Field-programmable Port eXtender (FPX) provides dynamic, fast, and flexible mechanisms to proces...
This manual summarizes how to insert the Field Programmable Port Extender (FPX) into the Washington ...
A prototype platform has been developed that allows pro-cessing of packets at the edge of a multi-gi...
While hardware plugins are well suited for processing data with high throughput, software plugins ar...
This document describes the design and functionality of the hardware components implemented in the F...
Reconfigurable hardware platforms are the key to extensible high speed networks. They provide flexib...
The ongoing increases of line speed in the Internet backbone combined with the need for increased fu...
The FPX provides simple and fast mechanisms to process cells or packets. By performing all computati...
An instructional platform has been developed that allows rapid prototype of network packet processin...
The ongoing increases of line speed in the Internet backbone combined with the need for increased fu...
This paper provides a tutorial survey of architectures of commercially available high-capacity field...
The ongoing exponential increase of line speed in the Internet and combined with the uncountable req...
Because of its flexibility and high performance, reconfigurable logic functions implemented on the Fie...
A library of layered protocol wrappers has been developed that process Internet packets in reconfigu...
This report covers the implementation of digital system design using Field Programmable Gate Array (...