This paper describes the design of a Broadcast Translation Circuit chip. The Broadcast Translation Circuit (BTC) provides unique addresses for each of the copies of a broadcast packet replicated by the copy network in a Broadcast Packet Switch [Tu85], [Tu86]. During a packet cycle or epoch, a packet is then passed on to the routing or distribution network. This chip has been fabricated in 2.0 μm CMOS technology
This thesis illustrates the design of a single chip Asynchronous Transfer Mode (ATM) protocol switch...
This material is presented to ensure timely dissemination of scholarly and technical work. Copyright...
The hardware design and VLSI implementation of a byte-wise CRC generator is presented. The algorithm...
This paper describes the design of a Broadcast Translation Circuit chip. The Broadcast Translation C...
This paper describes the design of the Packet Switch Element Chip, one of the components of a high s...
This paper describes the design of the Packet Switch Element Chip, one of the components of a high s...
This paper describes the modification made to the design of the Broadcast Translation Circuit based ...
The broadcast packet network is a form of communications network based on high speed packet switches...
This paper describes the design of the Packet Buffer Chip. Packet Buffers are FIFO queues used for b...
This paper describes the design of the PP3 packet processor chip. PP3 is one of the four component c...
This paper describes a high performance packet switching network that can be used to provide voice, ...
This project is to design two types of transmitter and receiver used in the serial link transmission...
The process of Integrated Circuits (IC) started its era of VLSI (Very Large Scale Integration) in 19...
Abstract—The growing number of cores in chip multi-processors increases the importance of interconne...
Design techniques and implementations of high-speed analog communication circuits: two analog-to-dig...
This thesis illustrates the design of a single chip Asynchronous Transfer Mode (ATM) protocol switch...
This material is presented to ensure timely dissemination of scholarly and technical work. Copyright...
The hardware design and VLSI implementation of a byte-wise CRC generator is presented. The algorithm...
This paper describes the design of a Broadcast Translation Circuit chip. The Broadcast Translation C...
This paper describes the design of the Packet Switch Element Chip, one of the components of a high s...
This paper describes the design of the Packet Switch Element Chip, one of the components of a high s...
This paper describes the modification made to the design of the Broadcast Translation Circuit based ...
The broadcast packet network is a form of communications network based on high speed packet switches...
This paper describes the design of the Packet Buffer Chip. Packet Buffers are FIFO queues used for b...
This paper describes the design of the PP3 packet processor chip. PP3 is one of the four component c...
This paper describes a high performance packet switching network that can be used to provide voice, ...
This project is to design two types of transmitter and receiver used in the serial link transmission...
The process of Integrated Circuits (IC) started its era of VLSI (Very Large Scale Integration) in 19...
Abstract—The growing number of cores in chip multi-processors increases the importance of interconne...
Design techniques and implementations of high-speed analog communication circuits: two analog-to-dig...
This thesis illustrates the design of a single chip Asynchronous Transfer Mode (ATM) protocol switch...
This material is presented to ensure timely dissemination of scholarly and technical work. Copyright...
The hardware design and VLSI implementation of a byte-wise CRC generator is presented. The algorithm...