CONTROL CHARACTERISTICS OF AN ALL-DIGITAL PROPORTIONAL-INTEGRAL-DERIVATIVE (PID) COMPENSATOR

The digitization of classical control systems presents a number of challenges and opportunities with respect to the miniaturization, distribution, reliability verification and obsolescence of both the controller and the underlying system under control. A method for the design of proportional-integral-derivative (PID) compensators realized in the form of all-digital components is presented. All-digital refers to a system implementation that is realizable with a wide range of digital logic components including discrete digital logic elements and programmable logic devices (PLDs) such as field-programmable gate arrays. The proportional, integral and derivative components of the classical PID control law were re-envisioned in terms of frequency of occurrences or counts for adaptation to combinatorial and sequential digital logic. Modification of the control scheme around this newly formed representation of system error enables the development of a PID-like FPGA-based or PLD-based controller. Details of the design of an all-digital PID-like controller including abstract, causal block diagrams and a MATLAB® and Simulink® based implementation are presented. The compensator was simulated in a velocity tracking DC motor control application and was found to perform comparably to that of a classical PID based control. Methods for assessing the resultant stability of an all-digital PID compensated system under control are discussed