Planar-junction, 1 mm x 1 mm, p+/n/n+ silicon solar cells, both with and without a textured surface, were fabricated in order to study the effects of decreased surface reflectance on cell efficiency. The texturing process was performed through the use of a KOH preferential etchant and an array of 10um x 10um windows to form an oxide masking layer. Inverted pyramids etched to points with final base widths being 13.7 microns due to undercutting of the masking oxide. Completed cells, evaluated at an irradiance of 100 mW/cm2, showed greater efficiences for the textured surface, but outputs of both were limited by series resistance
Resolution capability of a GCA Mann 4800 DSW Stepper was improved using a bilayer photoresist scheme...
Local stress field determination by means of free standing structures was investigated. The process ...
A Si3N4 etch process using a Plasmatherm 2406 etcher and SF6 was determined. RS1/Discover was used t...
The objective of this project was to investigate the possibility of producing array of microplasma, ...
This project dealt with the design and installation of a TCA bubbler system. Considerations for safe...
KTI-820, a positive photoresist was hardened utilizing two different methods. The PRIST technique in...
SOl (Silicon on Insulator) technology is an option in improving device performance as smaller device...
A dry etch S1O2 process was optimized using the Plasmatrac 2406 RIE etcher at RIT, while maintaining...
A common way of designing microelectronic circuits is by the use of standard cells. In advance syste...
An imaging technique using TM polarized illumination at 45 degree incidence to a highly reflective s...
A phase shifting mask, to be used for the purpose of improving the resolution of a projection lithog...
The effect of surface cleaning and passivation techniques on the reverse bias saturation current Jo ...
Resonant Interband Tunnel Diodes (RITD) with device sizes ranging from r=20μm to r=50nm (mask define...
This project entailed the design, fabrication, and testing of a surface micro-machined electret pres...
A simple method to evaluate photoresist sensitivity and development/exposure latitude was developed ...
Resolution capability of a GCA Mann 4800 DSW Stepper was improved using a bilayer photoresist scheme...
Local stress field determination by means of free standing structures was investigated. The process ...
A Si3N4 etch process using a Plasmatherm 2406 etcher and SF6 was determined. RS1/Discover was used t...
The objective of this project was to investigate the possibility of producing array of microplasma, ...
This project dealt with the design and installation of a TCA bubbler system. Considerations for safe...
KTI-820, a positive photoresist was hardened utilizing two different methods. The PRIST technique in...
SOl (Silicon on Insulator) technology is an option in improving device performance as smaller device...
A dry etch S1O2 process was optimized using the Plasmatrac 2406 RIE etcher at RIT, while maintaining...
A common way of designing microelectronic circuits is by the use of standard cells. In advance syste...
An imaging technique using TM polarized illumination at 45 degree incidence to a highly reflective s...
A phase shifting mask, to be used for the purpose of improving the resolution of a projection lithog...
The effect of surface cleaning and passivation techniques on the reverse bias saturation current Jo ...
Resonant Interband Tunnel Diodes (RITD) with device sizes ranging from r=20μm to r=50nm (mask define...
This project entailed the design, fabrication, and testing of a surface micro-machined electret pres...
A simple method to evaluate photoresist sensitivity and development/exposure latitude was developed ...
Resolution capability of a GCA Mann 4800 DSW Stepper was improved using a bilayer photoresist scheme...
Local stress field determination by means of free standing structures was investigated. The process ...
A Si3N4 etch process using a Plasmatherm 2406 etcher and SF6 was determined. RS1/Discover was used t...